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Add the t-power-on-us property to the PCIe root ports so that this value is correctly programmed during host initialization. Signed-off-by: Krishna Chaitanya Chundru --- arch/arm64/boot/dts/qcom/glymur.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi index f04058d2e089..f7d7d76830b3 100644 --- a/arch/arm64/boot/dts/qcom/glymur.dtsi +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi @@ -3001,6 +3001,8 @@ pcie4_port0: pcie@0 { #size-cells = <2>; ranges; + t-power-on-us = <80>; + port { pcie4_port0_ep: endpoint { }; @@ -3273,6 +3275,8 @@ pcie5_port0: pcie@0 { #size-cells = <2>; ranges; + t-power-on-us = <80>; + port { pcie5_port0_ep: endpoint { }; @@ -3489,6 +3493,8 @@ pcie6_port0: pcie@0 { #size-cells = <2>; ranges; + t-power-on-us = <80>; + port { pcie6_port0_ep: endpoint { }; @@ -3759,6 +3765,8 @@ pcie3b_port0: pcie@0 { #size-cells = <2>; ranges; + t-power-on-us = <80>; + port { pcie3b_port0_ep: endpoint { }; -- 2.34.1