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From: sashiko-bot@kernel.org
To: md.alam@oss.qualcomm.com, broonie@kernel.org,
	"Johan Alvarado" <contact@c127.dev>
Cc: j4g8y7@gmail.com, quic_varada@quicinc.com,
	linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org,
	miquel.raynal@bootlin.com, pengpeng@iscas.ac.cn,
	linux-kernel@vger.kernel.org, quic_srichara@quicinc.com,
	linux-mtd@lists.infradead.org, konradybcio@kernel.org
Subject: Re: [PATCH v2 2/2] spi: spi-qpic-snand: drop the redundant ECC context handling
Date: Fri, 11 Sep 2026 19:10:10 +0000	[thread overview]
Message-ID: <20260911191010.990EE1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260911184416.109790-3-contact@c127.dev>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Deterministic kernel panic in qcom_spi_block_erase() when the host ECC engine is bypassed (e.g., via non-NAND SPI memory drivers like spi-nor, or ON-DIE/software ECC).
--

commit a97a071d79125bb5db4d55c7d03a5f945fa92aef
Author: Johan Alvarado <contact@c127.dev>

    spi: spi-qpic-snand: drop the redundant ECC context handling
    
    qcom_spi_ecc_init_ctx_pipelined() now publishes the ECC context to
    snandc->qspi->ecc, so the assignment in
    qcom_spi_ecc_prepare_io_req_pipelined() repeats what the pointer already
    holds, and the zeroed struct qpic_ecc that qcom_spi_probe() allocates is
    never read.

> The pointer is non-NULL only between context creation and destruction,
> and every reader runs inside that window. The ooblayout callbacks are
> installed by init_ctx. The page read, write and program helpers run only
> when prepare_io_req has set page_rw or oob_rw. qcom_spi_block_erase()
> runs only while the mtd is registered, which happens after init_ctx and
> ends before cleanup_ctx.

Is this assumption accurate for all configurations?

If the device tree specifies ON-DIE or software ECC (nand,ecc-engine =
"on-die"), or if a non-NAND SPI memory device (like spi-nor) is attached to
this controller, won't the host's init_ctx be bypassed?

> diff --git a/drivers/spi/spi-qpic-snand.c b/drivers/spi/spi-qpic-snand.c
> index 20045d4a46fad..760ee1c29402f 100644
> --- a/drivers/spi/spi-qpic-snand.c
> +++ b/drivers/spi/spi-qpic-snand.c
[ ... ]
> @@ -1586,14 +1584,9 @@ static int qcom_spi_probe(struct platform_device *pdev)
>  	struct spi_controller *ctlr;
>  	struct qcom_nand_controller *snandc;
>  	struct qpic_spi_nand *qspi;
> -	struct qpic_ecc *ecc;
>  	struct resource *res;
>  	int ret;
>  
> -	ecc = devm_kzalloc(dev, sizeof(*ecc), GFP_KERNEL);
> -	if (!ecc)
> -		return -ENOMEM;
> -

[Severity: High]
If init_ctx is bypassed as described above, will removing this allocation
lead to a NULL pointer dereference in qcom_spi_block_erase()?

If snandc->qspi->ecc remains NULL, a standard block erase operation
delegated through qcom_spi_exec_op() to qcom_spi_block_erase() would appear
to dereference it:

drivers/spi/spi-qpic-snand.c:qcom_spi_block_erase() {
	struct qpic_ecc *ecc_cfg = snandc->qspi->ecc;
	...
	snandc->regs->cfg0 = cpu_to_le32((ecc_cfg->cfg0_raw & ~CW_PER_PAGE_MASK) |
					 FIELD_PREP(CW_PER_PAGE_MASK, 0));
}

>  	qspi = devm_kzalloc(dev, sizeof(*qspi), GFP_KERNEL);
>  	if (!qspi)
>  		return -ENOMEM;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260911184416.109790-1-contact@c127.dev?part=2

  reply	other threads:[~2026-09-11 19:10 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-11 18:44 [PATCH v2 0/2] spi: spi-qpic-snand: fix the stale ECC context pointer Johan Alvarado
2026-09-11 18:44 ` [PATCH v2 1/2] spi: spi-qpic-snand: publish the ECC context to snandc->qspi Johan Alvarado
2026-09-11 18:44 ` [PATCH v2 2/2] spi: spi-qpic-snand: drop the redundant ECC context handling Johan Alvarado
2026-09-11 19:10   ` sashiko-bot [this message]
2026-09-12  0:05     ` Johan Alvarado

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