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[144.49.247.14]) by smtp-relay.gmail.com with ESMTPS id d75a77b69052e-530ca6374cfsm437591cf.27.2026.09.11.16.35.48 for (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 11 Sep 2026 16:35:49 -0700 (PDT) X-Relaying-Domain: broadcom.com X-CFilter-Loop: Reflected Received: by mail-qv1-f69.google.com with SMTP id 6a1803df08f44-91054f537f9so36980586d6.0 for ; Fri, 11 Sep 2026 16:35:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1789169748; x=1789774548; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to:content-type; bh=rotk05yu0Xd3HMjEskHty3X9+grsIXwKqieBRwiJJGY=; b=YIbgXCMM0BUh7+jvZ3LZbDclyIQjnEk7LXtHzWoU+v+zVJLCDWiL4iGID8/xOzI4f2 5h8yPZLRGwHjVR0qwNb0l3NsHBUcg+ZdBf1UOofGzs7NUOzAa6zEOiOMu5r/V6i7OyZ4 hYwR7Kr9KdiL8Eq+3RWlXRJ6eR3SeYO+eorw0= X-Forwarded-Encrypted: i=1; AKwUvBwa87u/BRB599klKzD5BO08bRO+1vsG8kkujxxflGA4vcnevs1MQ+2jjH/zMVvHcuIj/qmTlLiRxr8EyMA=@vger.kernel.org X-Received: by 2002:a05:6214:40e:b0:910:6686:1542 with SMTP id 6a1803df08f44-9120289fbdfmr146241136d6.8.1789169746813; Fri, 11 Sep 2026 16:35:46 -0700 (PDT) X-Received: by 2002:a05:6214:40e:b0:910:6686:1542 with SMTP id 6a1803df08f44-9120289fbdfmr146240876d6.8.1789169746357; Fri, 11 Sep 2026 16:35:46 -0700 (PDT) Received: from stband-bld-1.and.broadcom.net ([192.19.144.250]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-9120f45ab71sm31717326d6.12.2026.09.11.16.35.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 16:35:45 -0700 (PDT) From: Jim Quinlan To: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com, james.quinlan@broadcom.com Cc: linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list), linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), Rob Herring Subject: [PATCH 00/13] PCI: brcmstb: Stop using chip numbers for conditions Date: Fri, 11 Sep 2026 19:35:25 -0400 Message-Id: <20260911233541.1650895-1-james.quinlan@broadcom.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-DetectorID-Processed: b00c1d49-9d2e-4205-b15f-d015386d3d5e Much of the brcmstb PCIe driver code does (essentially) this: if (pcie->chip == 0x1234 || pcie->chip == 0x5678) { /* ... */ } when it should instead do this: if (behavior_xyz(pcie)) { /* ... */ } This series does the above. In addition, some other minor improvements are added in the hopes of making the code more readable. Jim Quinlan (13): PCI: brcmstb: Remove redundant const specifier for struct fields PCI: brcmstb: Use flags u32 instead of bools PCI: brcmstb: Add Broadcom quirks macro PCI: brcmstb: Declare and assign quirk OB_WIN_32BIT_ADDR PCI: brcmstb: Declare and assign quirk OB_WIN_MAXSZ_128MB PCI: brcmstb: Declare and assign flag IS_BMIPS PCI: brcmstb: Declare and assign quirk 32BIT_PCI_OPS PCI: brcmstb: Declare and assign quirk NO_RGR1_TIMER PCI: brcmstb: Declare and assign quirk EARLY_PERST_ASSERT PCI: brcmstb: Declare and assign quirk PERST_PCIE_REV_CUTOFF PCI: brcmstb: Put max_burst_size setting in cfg_data PCI: brcmstb: Use order-0 indexing for inbound BAR window array PCI: brcmstb: Split up complicated function into two variants drivers/pci/controller/pcie-brcmstb.c | 267 +++++++++++++++----------- 1 file changed, 158 insertions(+), 109 deletions(-) base-commit: bc35965f6940a9bf834d54187b6088b8eb09206d -- 2.34.1