[PATCH] phy: phy-mtk-dp: Fix pdata array members initialized as pointers

[Sasha Levin <sashal@kernel.org>]

Building arm/arm64/i386 allmodconfig with clang fails:

  drivers/phy/mediatek/phy-mtk-dp.c:761:18: error: incompatible pointer
  to integer conversion initializing 'u16' (aka 'unsigned short') with
  an expression of type 'const u16[4]' [-Wint-conversion]
  drivers/phy/mediatek/phy-mtk-dp.c:761:18: error: initializer element
  is not a compile-time constant
  drivers/phy/mediatek/phy-mtk-dp.c:761:18: error: suggest braces around
  initialization of subobject [-Werror,-Wmissing-braces]

14 errors in total, one set per offending member.

off_ana_lane, off_dig_lane and driving_params are declared as arrays in
struct mtk_dp_phy_pdata:

	u16 off_ana_lane[MTK_DP_PHY_MAX_LANES];
	u16 off_dig_lane[MTK_DP_PHY_MAX_LANES];
	u32 driving_params[PHYD_DIG_NUM_DRV_PARA_REGS];

but the SoC data instances initialize them with compound literals. A
compound literal is an object, not an initializer list, so this is not
an array initializer: the member is initialized element-wise from a
scalar, the first element gets the address of the literal truncated to
u16/u32, and the remaining elements are zeroed. Hence the three
diagnostics above - the pointer-to-integer conversion, the address not
being a compile-time constant, and the missing braces.

Arrays are the right type here, since both members are indexed per lane
and driving_params is sized with ARRAY_SIZE(), so drop the casts and use
plain braced initializers.

Found by KernelCI builds of the linus-next tree.

Fixes: ae859204b519 ("phy: phy-mtk-dp: Migrate register offsets to SoC specific pdata")
Fixes: 7cf38eb0ab59 ("phy: phy-mtk-dp: Add support for digital and analog calibration")
Fixes: 6fe4d5beac72 ("phy: phy-mtk-dp: Add support for MT8196 eDP PHY")
Assisted-by: LLM
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/phy/mediatek/phy-mtk-dp.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/phy/mediatek/phy-mtk-dp.c b/drivers/phy/mediatek/phy-mtk-dp.c
index 7108b16d33a27..dbef4a4bd60a9 100644
--- a/drivers/phy/mediatek/phy-mtk-dp.c
+++ b/drivers/phy/mediatek/phy-mtk-dp.c
@@ -758,9 +758,9 @@ static int mtk_dp_phy_probe(struct platform_device *pdev)
 
 static const struct mtk_dp_phy_pdata mt8195_dp_phy_data = {
 	.off_ana_glb = 0,
-	.off_ana_lane = (const u16[]) { 0x100, 0x200, 0x300, 0x400 },
+	.off_ana_lane = { 0x100, 0x200, 0x300, 0x400 },
 	.off_dig_glb = 0x1000,
-	.off_dig_lane = (const u16[]) { 0x1100, 0x1200, 0x1300, 0x1400 },
+	.off_dig_lane = { 0x1100, 0x1200, 0x1300, 0x1400 },
 	.regs_ana_glb = mt8195_phy_ana_glb_regs,
 	.regs_ana_lane = mt8195_phy_ana_lane_regs,
 	.regs_dig_glb = mt8195_phy_dig_glb_regs,
@@ -773,7 +773,7 @@ static const struct mtk_dp_phy_pdata mt8195_dp_phy_data = {
 		.pmos = 8,
 		.nmos = 8,
 	},
-	.driving_params = (const u32[]) {
+	.driving_params = {
 		[0] = 0,
 		[1] = 0,
 		[2] = 0,
@@ -788,9 +788,9 @@ static const struct mtk_dp_phy_pdata mt8195_dp_phy_data = {
 
 static const struct mtk_dp_phy_pdata mt8196_edp_phy_data = {
 	.off_ana_glb = 0x400,
-	.off_ana_lane = (const u16[]) { 0x0, 0x100, 0x200, 0x300 },
+	.off_ana_lane = { 0x0, 0x100, 0x200, 0x300 },
 	.off_dig_glb = 0x1400,
-	.off_dig_lane = (const u16[]) { 0x1000, 0x1100, 0x1200, 0x1300 },
+	.off_dig_lane = { 0x1000, 0x1100, 0x1200, 0x1300 },
 	.regs_ana_glb = mt8195_phy_ana_glb_regs,
 	.regs_ana_lane = mt8195_phy_ana_lane_regs,
 	.regs_dig_glb = mt8196_phy_dig_glb_regs,
@@ -803,7 +803,7 @@ static const struct mtk_dp_phy_pdata mt8196_edp_phy_data = {
 		.pmos = 8,
 		.nmos = 8,
 	},
-	.driving_params = (const u32[]) {
+	.driving_params = {
 		[0] = 0,
 		[1] = 0,
 		[2] = 0,
-- 
2.53.0