From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 02E8A3F58F5; Mon, 14 Sep 2026 07:34:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789371282; cv=none; b=QWOB4xRwT/hFp99ZJ+qqvPY9wMn/Fejq0CX4aIMb6uegknT2/OVI+R4JT4eILvzfYQ7taOTmD9yYCXlGBJDZgJcj6Op/bCxIlSgNS3arXVLODXPm2TNtWUjCNxLLXIbHBP4748uzP5geQqz5CGIgiXiC2dP0WJ3yzuOBskh0mgg= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789371282; c=relaxed/simple; bh=TsW0LF9D07cLM9suzR6FmGmSBVkbn7V+c7Y69L1Arm4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=QWzqYDAl38ciMk6bZnIvTlhl5AiFryRKsqxSXgXgShEFScYqjgjb2eK7U/ZpCHqniS0w+PElo+y3ksX6hruuWHw8aH/Bl/EtTbcLnSodpvSDgjHi5+hepvQMDmi6epzZbw3wgPlknpGc7gQhlPX7QVquSQU6ESWGgxUvWTYz2xI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=oq4B5O0Y; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="oq4B5O0Y" X-UUID: baeb5548b00e11f1b1788b6acf885367-20260914 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=qepR3v5aTIm475/jFJ5JhFl0cVRkwu0PQzuGvpFxglU=; b=oq4B5O0YzmpkW/SE/w3CNabU/uxCepWKPYRTFGuyhOnsFqkrOBpd9TafhCOSkR6ghEHCCvwyfHGy7s6RaNjuVxXBQWjrx4hIB1mv7sSnMfywvK+OYYnFOFAui6a9Vl106Cv41anMxlSL0i6hjo+6c7pzInaIjFUE9G9Sa/ZENuM=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.19,REQID:5f7f5eae-ad3b-4c70-8bed-bbf52c9504ea,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:7db8b62,CLOUDID:07b93c0c-027a-4b0a-91ab-050fa8cdb9b0,B ulkID:nil,BulkQuantity:0,SF:81|82|102|136|836|865|888|898,TC:-5,Content:0| 15|50|99,EDM:-3|-100,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:-1,COL :0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: baeb5548b00e11f1b1788b6acf885367-20260914 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 994479426; Mon, 14 Sep 2026 15:34:33 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.29; Mon, 14 Sep 2026 15:34:32 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.2562.29 via Frontend Transport; Mon, 14 Sep 2026 15:34:31 +0800 From: Irui Wang To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Krzysztof Kozlowski , , , , Tiffany Lin , kyrie wu CC: Yunfei Dong , Maoguang Meng , Longfei Wang , Irui Wang , , , , , , Subject: [PATCH v8 4/6] media: mediatek: encoder: Add support for common firmware interface Date: Mon, 14 Sep 2026 15:34:19 +0800 Message-ID: <20260914073423.16131-5-irui.wang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20260914073423.16131-1-irui.wang@mediatek.com> References: <20260914073423.16131-1-irui.wang@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-MTK: N The existing encoder firmware interface implied just one type of codec: H.264. Future encoders may support additional codecs; however adding entire sets of interfaces for them is not scalable. Instead, a new "common" firmware interface is defined for non codec specific messages. The new messages encapsulate the old ones for backward compatibility. This patch adds support for these new messages. Signed-off-by: Irui Wang Reviewed-by: Nicolas Dufresne --- .../vcodec/encoder/mtk_vcodec_enc_drv.h | 3 ++ .../mediatek/vcodec/encoder/venc_drv_if.c | 3 +- .../mediatek/vcodec/encoder/venc_ipi_msg.h | 26 +++++++++++++++ .../mediatek/vcodec/encoder/venc_vpu_if.c | 33 ++++++++++++------- 4 files changed, 52 insertions(+), 13 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h index 6c7e8da6d..ebbb08d5f 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h +++ b/drivers/media/platform/mediatek/vcodec/encoder/mtk_vcodec_enc_drv.h @@ -16,6 +16,7 @@ #define MTK_ENC_CTX_IS_EXT(ctx) ((ctx)->dev->venc_pdata->uses_ext) #define MTK_ENC_IOVA_IS_34BIT(ctx) ((ctx)->dev->venc_pdata->uses_34bit) +#define MTK_ENC_DRV_IS_COMM(ctx) (((ctx)->dev->venc_pdata->uses_common_fw_iface)) /** * struct mtk_vcodec_enc_pdata - compatible data for each IC @@ -30,6 +31,7 @@ * @num_output_formats: number of entries in output_formats * @core_id: stand for h264 or vp8 encode index * @uses_34bit: whether the encoder uses 34-bit iova + * @uses_common_fw_iface: whether the encoder uses common driver interface * @fw_type: firmware type (VPU, SCP, or VCP) * @fw_init: firmware-specific initialization callback * @ipi_id: IPI ID for encoder communication with firmware @@ -45,6 +47,7 @@ struct mtk_vcodec_enc_pdata { size_t num_output_formats; u8 core_id; bool uses_34bit; + bool uses_common_fw_iface; enum mtk_vcodec_fw_type fw_type; struct mtk_vcodec_fw *(*fw_init)(void *priv, enum mtk_vcodec_fw_use fw_use); int ipi_id; diff --git a/drivers/media/platform/mediatek/vcodec/encoder/venc_drv_if.c b/drivers/media/platform/mediatek/vcodec/encoder/venc_drv_if.c index e83747b8d..f8c9349c1 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/venc_drv_if.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/venc_drv_if.c @@ -19,13 +19,14 @@ int venc_if_init(struct mtk_vcodec_enc_ctx *ctx, unsigned int fourcc) { int ret = 0; + const bool uses_common_fw_iface = MTK_ENC_DRV_IS_COMM(ctx); switch (fourcc) { case V4L2_PIX_FMT_VP8: ctx->enc_if = &venc_vp8_if; break; case V4L2_PIX_FMT_H264: - ctx->enc_if = &venc_h264_if; + ctx->enc_if = uses_common_fw_iface ? &venc_if : &venc_h264_if; break; default: return -EINVAL; diff --git a/drivers/media/platform/mediatek/vcodec/encoder/venc_ipi_msg.h b/drivers/media/platform/mediatek/vcodec/encoder/venc_ipi_msg.h index bb16d96a7..ce3c2c805 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/venc_ipi_msg.h +++ b/drivers/media/platform/mediatek/vcodec/encoder/venc_ipi_msg.h @@ -45,6 +45,20 @@ struct venc_ap_ipi_msg_init { uint64_t venc_inst; }; +/** + * struct venc_ap_ipi_msg_init_comm - AP to VPU init cmd structure + * @base: AP to VPU init cmd structure + * @codec_type: encoder type + * @reserved: reserved field + * @shared_iova: shared iova + */ +struct venc_ap_ipi_msg_init_comm { + struct venc_ap_ipi_msg_init base; + u32 codec_type; + u32 reserved; + u64 shared_iova; +}; + /** * struct venc_ap_ipi_msg_set_param - AP to VPU set_param cmd structure * @msg_id: message id (AP_IPIMSG_XXX_ENC_SET_PARAM) @@ -175,6 +189,18 @@ struct venc_vpu_ipi_msg_init { uint32_t venc_abi_version; }; +/** + * struct venc_vpu_ipi_msg_init_comm - VPU ack AP init cmd structure + * @init_ack: AP init cmd structure + * @vpu_vsi_addr: VSI address from VPU + * @reserved: reserved field + */ +struct venc_vpu_ipi_msg_init_comm { + struct venc_vpu_ipi_msg_init init_ack; + u32 vpu_vsi_addr; + u32 reserved; +}; + /** * struct venc_vpu_ipi_msg_set_param - VPU ack AP set_param cmd structure * @msg_id: message id (VPU_IPIMSG_XXX_ENC_SET_PARAM_DONE) diff --git a/drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c b/drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c index 0c825aa72..7772b8442 100644 --- a/drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c +++ b/drivers/media/platform/mediatek/vcodec/encoder/venc_vpu_if.c @@ -10,24 +10,25 @@ static void handle_enc_init_msg(struct venc_vpu_inst *vpu, const void *data) { - const struct venc_vpu_ipi_msg_init *msg = data; + const struct venc_vpu_ipi_msg_init_comm *msg = data; + struct mtk_vcodec_fw *fw = vpu->ctx->dev->fw_handler; - vpu->inst_addr = msg->vpu_inst_addr; - vpu->vsi = mtk_vcodec_fw_map_dm_addr(vpu->ctx->dev->fw_handler, - msg->vpu_inst_addr); + vpu->inst_addr = msg->init_ack.vpu_inst_addr; + vpu->vsi = mtk_vcodec_fw_map_dm_addr(fw, vpu->inst_addr); /* Firmware version field value is unspecified on MT8173. */ - if (mtk_vcodec_fw_get_type(vpu->ctx->dev->fw_handler) == VPU) + if (mtk_vcodec_fw_get_type(fw) == VPU) return; /* Check firmware version. */ - mtk_venc_debug(vpu->ctx, "firmware version: 0x%x\n", msg->venc_abi_version); - switch (msg->venc_abi_version) { + mtk_venc_debug(vpu->ctx, "firmware version: 0x%x\n", + msg->init_ack.venc_abi_version); + switch (msg->init_ack.venc_abi_version) { case 1: break; default: mtk_venc_err(vpu->ctx, "unhandled firmware version 0x%x\n", - msg->venc_abi_version); + msg->init_ack.venc_abi_version); vpu->failure = 1; break; } @@ -133,7 +134,8 @@ static int vpu_enc_send_msg(struct venc_vpu_inst *vpu, void *msg, int vpu_enc_init(struct venc_vpu_inst *vpu) { int status; - struct venc_ap_ipi_msg_init out = { }; + size_t msg_size; + struct venc_ap_ipi_msg_init_comm out = { }; init_waitqueue_head(&vpu->wq_hd); vpu->signaled = 0; @@ -149,9 +151,16 @@ int vpu_enc_init(struct venc_vpu_inst *vpu) return -EINVAL; } - out.msg_id = AP_IPIMSG_ENC_INIT; - out.venc_inst = (unsigned long)vpu; - if (vpu_enc_send_msg(vpu, &out, sizeof(out))) { + out.base.msg_id = AP_IPIMSG_ENC_INIT; + out.base.venc_inst = (unsigned long)vpu; + if (MTK_ENC_DRV_IS_COMM(vpu->ctx)) { + out.codec_type = vpu->ctx->q_data[MTK_Q_DATA_DST].fmt->fourcc; + msg_size = sizeof(struct venc_ap_ipi_msg_init_comm); + } else { + msg_size = sizeof(struct venc_ap_ipi_msg_init); + } + + if (vpu_enc_send_msg(vpu, &out, msg_size)) { mtk_venc_err(vpu->ctx, "AP_IPIMSG_ENC_INIT fail"); return -EINVAL; } -- 2.55.0.windows.3