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Mon, 14 Sep 2026 00:49:37 -0700 From: Zhi Wang To: , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Zhi Wang Subject: [PATCH v2 03/32] gpu: nova-core: vgpu: detect boot state independently Date: Mon, 14 Sep 2026 10:48:38 +0300 Message-ID: <20260914074907.1399629-4-zhiw@nvidia.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260914074907.1399629-1-zhiw@nvidia.com> References: <20260914074907.1399629-1-zhiw@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF00022BCD:EE_|SA3PR12MB8047:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e469415-ee56-4949-9740-08df1234c87d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|82310400026|1800799024|23010399003|36860700016|10067099003|11063799006|56012099006|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: UR0tr5E9frRfTghyM7jN07yuLRCk6q5HpOMDFqiiuCo8/SZ5y/h7XfIIC4hIvZfj5cJvJ+8Fd16rpehX59+qjAfAO8Dp+1LzSK0zX6QbysyHurwDrCT0Xo5B0rnxKKnVCak5xi0UyIb1Y1TekQEKejd/0JCFESL/Ai6JJ9jPxx/korjd6LBaxqtcBDuug1EGdKIVnPwYVpJRFmoFgob9g91dQVSN3RnyBe2Y3dWWu/NR8WIyC9Cw2v/O+pwZTZzZitsPvDB3R18Z8Gi0ye9RCSOdls2z3g5SUhsJo97Rpbut4p/oPhyquz2upPPxKRCxmougZvd3zJCDSpbna705HFh8MQqtO3UfhosTGzowPGqsJqj/yN5C2Bw38UgVyLBddvB2X3yoXN+h5y9Vjpa/eZq8J7akkBidb4GQtwyqegJPS5fJTZkdHKtOKIlhhkp2 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Sep 2026 07:50:01.9291 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9e469415-ee56-4949-9740-08df1234c87d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF00022BCD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8047 The vGPU manager currently contains only the detected boot mode. Its construction couples mode detection to an object with no runtime management responsibilities. Firmware setup needs the mode before allocating GSP resources, even when vGPU is disabled. Keeping that value with GspResources also makes it available throughout the firmware lifecycle without a manager. Move detection to VgpuState and store its result in GspResources. Borrow it directly when constructing the boot and unload contexts, and remove the state-only manager wrapper. Preserve the FSP query order, existing diagnostics and disabled fallback. No functional change is intended. Cc: Alexandre Courbot Signed-off-by: Zhi Wang --- drivers/gpu/nova-core/gpu.rs | 11 +++++------ drivers/gpu/nova-core/vgpu.rs | 25 ++++++++----------------- 2 files changed, 13 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index cf24c0d00173..39e9e4ab0be6 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -48,7 +48,7 @@ GpuMm, VramAddress, // }, - vgpu::VgpuManager, // + vgpu::VgpuState, // }; #[cfg_attr(not(CONFIG_KUNIT = "y"), expect(dead_code))] @@ -294,8 +294,7 @@ struct GspResources<'gpu> { // TODO: use different resource types for each boot method, and make the relevant Gsp methods // generic against them. fsp: Option>, - /// vGPU state detected before GSP boot. - vgpu: VgpuManager, + vgpu_state: VgpuState, /// GSP runtime data. #[pin] gsp: Gsp<'gpu>, @@ -359,7 +358,7 @@ fn drop(self: Pin<&mut Self>) { gsp_falcon: &*this.gsp_falcon, sec2_falcon: &*this.sec2_falcon, fsp: this.fsp.as_mut(), - vgpu_state: this.vgpu.state(), + vgpu_state: this.vgpu_state, }, bundle, ) @@ -410,7 +409,7 @@ pub(crate) fn new<'a>( fsp: Fsp::try_new(dev, bar, spec.chipset)?, - vgpu: VgpuManager::new(pdev, spec.chipset, fsp.as_mut()), + vgpu_state: VgpuState::detect(pdev, spec.chipset, fsp.as_mut()), gsp <- Gsp::new(pdev, bar), @@ -424,7 +423,7 @@ pub(crate) fn new<'a>( gsp_falcon, sec2_falcon, fsp: fsp.as_mut(), - vgpu_state: vgpu.state(), + vgpu_state, })?, }), diff --git a/drivers/gpu/nova-core/vgpu.rs b/drivers/gpu/nova-core/vgpu.rs index 905b3a7331fd..b405ba49c490 100644 --- a/drivers/gpu/nova-core/vgpu.rs +++ b/drivers/gpu/nova-core/vgpu.rs @@ -30,19 +30,16 @@ pub(crate) enum VgpuState { }, } -/// vGPU state manager. -pub(crate) struct VgpuManager { - state: VgpuState, -} - -impl VgpuManager { - /// Creates a vGPU manager by querying SR-IOV and the FSP PRC vGPU knob. - pub(crate) fn new( +impl VgpuState { + /// Detects the boot mode, falling back to disabled if querying the device fails. + /// + /// Call after creating the FSP and before allocating GSP firmware resources. + pub(crate) fn detect( pdev: &pci::Device>, chipset: Chipset, fsp: Option<&mut Fsp<'_>>, ) -> Self { - let state = Self::detect_state(pdev, chipset, fsp).unwrap_or_else(|e| { + let state = Self::query_state(pdev, chipset, fsp).unwrap_or_else(|e| { dev_warn!( pdev, "vGPU state detection failed: {:?}; disabling vGPU\n", @@ -51,12 +48,11 @@ pub(crate) fn new( VgpuState::Disabled }); dev_dbg!(pdev, "vGPU state: {:?}\n", state); - - Self { state } + state } /// Detects the vGPU state from the chipset, SR-IOV capability and FSP PRC knob. - fn detect_state( + fn query_state( pdev: &pci::Device>, chipset: Chipset, fsp: Option<&mut Fsp<'_>>, @@ -83,9 +79,4 @@ fn detect_state( VgpuMode::Disabled => Ok(VgpuState::Disabled), } } - - /// Returns the detected vGPU state for this boot. - pub(crate) fn state(&self) -> &VgpuState { - &self.state - } }