From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97330410D06 for ; Mon, 14 Sep 2026 08:45:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789375512; cv=none; b=Rwijant4yCeuhMtYlKwjHsycCROoJc+T5IVEePACuaNTqtuLl7P5EQz7EVnkanAlDneKIcsU3iuQKaTlKw3q/oX2b2LJsok0E6BCl2KBL7sUdoTzIi//TQ4VmJlm1TS/wFjtF4fIxQVy+ZkB+93idopxPyyzWQNBjjWn2UrY4t8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789375512; c=relaxed/simple; bh=5t35/AD2DIV9TZyDKY+TCxkdh48h02qUWokLl3mkgzI=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fatjPI5yTT+t3bepR4Ug7I20TtL7Sx5s4U3IpBwsPftNejaazIgcJIMQqk0PTzS4wfMtgilkqgavIgDGCJCb39pmSBp606GAQ3lDynCH5PoKotDD8M20J5f8u4G5JiKhtsM40zGZgjB7aLjAoc9IWPeEgZGWH9KGtRw3rAgdG+E= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=An/ke5PO; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="An/ke5PO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1789375506; bh=5t35/AD2DIV9TZyDKY+TCxkdh48h02qUWokLl3mkgzI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=An/ke5POqqfzDoq3Y3bRXllc9/2dKU4cpNMKg89B20Xm0rd6CBnKIpFjIKecEVNoe u1hj3fQY+SziIjtFyO8cx/Dj+VICwe9bFyq97cWuXLHGloV84IjXkexU9DyFypgWO3 3ewudQUVUfJgzt7c3MX46FYNcndsonm6P5spbm0tpULeOR6LktP8W0o8amnDuH1kj3 W0R/3Cvv/aj6FCITzc+C0JdsggwS9SlbaIlgxSKEKPiS3+KvUGM8Vo/zFJ96az0OoO Di3xAa6TnlF0EMnJkTWFPKFWrPC0cvjrZcaqE9wp07MtOvDTwSWv3wx29FrkOi4kKO KSpqfnOBc7nyg== Received: from fedora-21.home (unknown [100.64.0.11]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange secp256r1 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: bbrezillon) by bali.collaboradmins.com (Postfix) with ESMTPSA id 1C0B117E020C; Mon, 14 Sep 2026 10:45:06 +0200 (CEST) Date: Mon, 14 Sep 2026 10:45:00 +0200 From: Boris Brezillon To: =?UTF-8?B?QWRyacOhbg==?= Larumbe Cc: Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , Neil Armstrong Subject: Re: [PATCH v9 05/16] drm/panfrost: Consolidate device clock management and reset Message-ID: <20260914104500.6e32c6cd@fedora-21.home> In-Reply-To: <20260912-claude-fixes-v9-5-e588feaa61ef@collabora.com> References: <20260912-claude-fixes-v9-0-e588feaa61ef@collabora.com> <20260912-claude-fixes-v9-5-e588feaa61ef@collabora.com> Organization: Collabora X-Mailer: Claws Mail 4.4.0 (GTK 3.24.52; x86_64-redhat-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Sat, 12 Sep 2026 00:28:06 +0100 Adri=C3=A1n Larumbe wrote: > Gather all clock enables and disables into a single function to avoid > repetitions between driver init/fini and device resume/suspend, since > these clocks are always handled in bulk. >=20 > Also do clk (un)prepares and dis/enables at the same time, since the > clk_prepare_* family of functions can simply increase the refcnt of > an already prepared clock. >=20 > Signed-off-by: Adri=C3=A1n Larumbe Reviewed-by: Boris Brezillon Two nits below. > --- > drivers/gpu/drm/panfrost/panfrost_device.c | 118 +++++++++++++----------= ------ > 1 file changed, 52 insertions(+), 66 deletions(-) >=20 > diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm= /panfrost/panfrost_device.c > index b3a53504bd01..2fcbd223204c 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_device.c > +++ b/drivers/gpu/drm/panfrost/panfrost_device.c > @@ -34,10 +34,46 @@ static void panfrost_reset_fini(struct panfrost_devic= e *pfdev) > reset_control_assert(pfdev->rstc); > } > =20 > -static int panfrost_clk_init(struct panfrost_device *pfdev) > +static int panfrost_clk_enable(struct panfrost_device *pfdev, bool enabl= e_ace_clock) I don't want to have a flag added for each new clock we decide to keep enabled on RPM suspend, so how about s/enable_ace_clock/on_resume/? Also, since it's enabling more than one clk, I'd go s/panfrost_clk_enable/panfrost_clks_enable/. > { > int err; > + > + err =3D clk_prepare_enable(pfdev->clock); > + if (err) > + return err; > + > + err =3D clk_prepare_enable(pfdev->bus_clock); > + if (err) > + goto disable_clock; > + > + if (enable_ace_clock) { > + err =3D clk_prepare_enable(pfdev->bus_ace_clock); > + if (err) > + goto disable_bus_clock; > + } > + > + return 0; > + > +disable_bus_clock: > + clk_disable_unprepare(pfdev->bus_clock); > +disable_clock: > + clk_disable_unprepare(pfdev->clock); > + > + return err; > +} > + > +static void panfrost_clk_disable(struct panfrost_device *pfdev, bool dis= able_ace_clock) Similarly, I'd go s/disable_ace_clock/on_suspend/ and s/panfrost_clk_disable/panfrost_clks_disable/.