Re: [PATCH v11 3/7] firmware: arm_rmm: Move RSI support out of arch/arm64

[Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>]

On Mon, 14 Sep 2026 11:35:07 +0530
"Aneesh Kumar K.V (Arm)" <aneesh.kumar@kernel.org> wrote:

> The RSI SMCCC function IDs describe a firmware ABI and are not arm64
> architecture specific definitions. Follow-up changes need to use them from
> non-arch code, including drivers/firmware/smccc and the Arm CCA guest
> driver.
> 
> Move the complete Realm Service Interface (RSI) implementation from
> arch/arm64 to drivers/firmware/arm_rmm. The RSI SMCCC definitions and
> command helpers are also moved to include/linux so they can be shared by
> architecture code and firmware or driver code. This also keeps the
> firmware interface outside architecture code, as requested [1].
> 
> [1] https://lore.kernel.org/all/agsNO9cc7H-b0H8L@willie-the-truck
> 
> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com>
> Signed-off-by: Aneesh Kumar K.V (Arm) <aneesh.kumar@kernel.org>

Moving the code makes sense and indeed that is what the patch does so
Reviewed-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>

Trivial gripe about the original code inline.

> diff --git a/arch/arm64/include/asm/rsi_cmds.h b/include/linux/arm-rsi-cmds.h
> similarity index 69%
> rename from arch/arm64/include/asm/rsi_cmds.h
> rename to include/linux/arm-rsi-cmds.h
> index c1fab41f671e..9e8a8c189ca1 100644
> --- a/arch/arm64/include/asm/rsi_cmds.h
> +++ b/include/linux/arm-rsi-cmds.h

>  
> +static inline int rsi_set_memory_range(phys_addr_t start, phys_addr_t end,
> +				       enum ripas state, unsigned long flags)
> +{
> +	unsigned long ret;
> +	phys_addr_t top;
> +
> +	while (start != end) {
> +		ret = rsi_set_addr_range_state(start, end, state, flags, &top);
> +		if (ret || top < start || top > end)

Obviously this is just code movement, but why eat the error value that
rsi_set_addr_range_state() returns? 

> +			return -EINVAL;
> +		start = top;
> +	}
> +
> +	return 0;
> +}