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Mon, 14 Sep 2026 09:53:21 -0700 (PDT) Received: from cabron.k.g ([95.111.117.177]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c2965c4e8a1sm467264566b.6.2026.09.14.09.53.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Sep 2026 09:53:19 -0700 (PDT) Date: Mon, 14 Sep 2026 19:53:18 +0300 From: Petko Manolov To: Krzysztof Kozlowski Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org Subject: Re: [PATCH v4 2/3] dt-bindings: arm: altera: add Draeger M48 Module Message-ID: <20260914165318.GA10966@cabron.k.g> References: <20260911150755.2803736-1-petko.manolov@konsulko.com> <20260911150755.2803736-3-petko.manolov@konsulko.com> <20260913-perky-resolute-badger-6c5e96@quoll> <20260913133214.GF20345@cabron.k.g> <565e4f26-69c3-4129-b4f1-29d67c381591@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <565e4f26-69c3-4129-b4f1-29d67c381591@kernel.org> On 26-09-13 16:20:54, Krzysztof Kozlowski wrote: > On 13/09/2026 15:32, Petko Manolov wrote: > > On 26-09-13 11:18:16, Krzysztof Kozlowski wrote: > >> On Fri, Sep 11, 2026 at 06:07:53PM +0300, Petko Manolov wrote: > >>> Add DT compatible string for Draeger's M48 CPU Module, an i.MX6 > >>> based board. > >> > >> Sashiko comment is valid. > > > > Sashiko doesn't know that this is indeed an i.MX6q board with the Altera FPGA as > > a separate module, that is secondary to the NXP SoC. > > > > What do you want me to put in the commit message so that everyone is happy? > > Your commit msgs for bindings and DTS should explain the hardware and with the > current explanation this is just so incomplete that basically wrong. i.mx6 is Incomplete - yes, but who cares. The only consumer is Draeger and they know better than anyone else what the board looks like and what it is for. Wrong - how? > completely different vendor. Altera FPGA does not make it Altera SoCFPGA, > these are two different things. If Linux runs on iMX6, then what are you > describing here? DTS which never is going to be loaded because there is no > SocFPGA? I'm no Draeger employee, but i've been told that both the i.MX6 and the FPGA are running Linux (both chips are on the same physical board) and are monitoring each other's health. Apart from doing whatever whatever their primary task is. Whichever fails, the other guy takes over on the fly. This is a medical device so full redundancy is a must. So, again and in order to save everyone's time, please elaborate (preferably with an existing example) whatever it is that you expect to see in the cover letter and the commit messages. Petko