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Mon, 14 Sep 2026 23:00:44 +0000 From: Ali Rouhi To: "netdev@vger.kernel.org" CC: Ali Rouhi , "jiri@resnulli.us" , "vadim.fedorenko@linux.dev" , "arkadiusz.kubalewski@intel.com" , "ivecera@redhat.com" , "robh@kernel.org" , "krzk+dt@kernel.org" , "conor+dt@kernel.org" , "cjubran@nvidia.com" , "pabeni@redhat.com" , "Oleg.Zadorozhnyi@devoxsoftware.com" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH net-next v8 14/15] dpll: sit9531x: model the inter-PLL sync net as a pair of pins Thread-Topic: [PATCH net-next v8 14/15] dpll: sit9531x: model the inter-PLL sync net as a pair of pins Thread-Index: AQHdOyOxiUDGlhbKx0eOlCCv0G44Q7bEqZIAgAoZ1gA= Date: Mon, 14 Sep 2026 23:00:40 +0000 Message-ID: <20260914230034.63861-13-arouhi@sitime.com> References: <178887152869.219967.4994728950594018497@kernel.org> In-Reply-To: <178887152869.219967.4994728950594018497@kernel.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=sitime.com; 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Replies inline.=0A= =0A= > Can the bit be stranded when the rollback itself fails? [and: the rollbac= k=0A= > writes dis_val to entries the aborted enable never touched]=0A= =0A= v9 logs a rollback failure explicitly (original=0A= error and rollback error both), so a stranded enable is visible rather than= =0A= silent, and intsync_src is additionally reconciled with the hardware at pro= be=0A= (see below), so a stranded bit cannot survive a rebind unnoticed. On the= =0A= second point: the disable values are the documented quiescent state of the= =0A= INTSYNC block, not a restore of arbitrary prior content -- the enable path= =0A= owns all eight registers, so driving them to the quiescent state after a=0A= failed enable is the intended containment, and it matches what a fresh=0A= disable request would program.=0A= =0A= > What state is the driver in if one of the later ones fails? [partial=0A= > disable keeps cached owner]=0A= =0A= v9 clears the cached owner as soon=0A= as the authoritative global-enable clear has committed, so a partial disabl= e=0A= leaves the cache saying "no owner" (matching the bit that controls the net)= =0A= and a retry converges instead of short-circuiting.=0A= =0A= > Is intsync_src ever reconciled with the hardware?=0A= =0A= Yes -- fixed in v9: probe now detects the INTSYNC state from the=0A= global enable bit and the per-PLL EXT configuration and seeds intsync_src= =0A= from it, so a rebind (or a blob that boots with INTSYNC active) starts from= =0A= the hardware truth instead of -1.=0A= =0A= > Should the policy errno be excluded here as the two peer setters in this= =0A= > file do?=0A= =0A= Yes -- fixed in v9: the filter excludes -EINVAL and -EOPNOTSUPP like=0A= the peer setters, so a policy rejection keeps its specific extack text.=0A= =0A= > Should the hardware's current selection be reported through=0A= > DPLL_A_PIN_OPERSTATE rather than DPLL_A_PIN_STATE here?=0A= =0A= The getter follows the pin-state contract stated once above the ops=0A= tables and applied uniformly to all selection-role pins in this driver:=0A= CONNECTED reports the reference the DPLL is actually locked to, which is th= e=0A= same convention ice uses for its input pins. We agree the operstate split = is=0A= the cleaner model going forward and are happy to add=0A= .operstate_on_dpll_get in a follow-up series -- for this series we kept one= =0A= consistent convention across all input pins rather than switching the model= =0A= for one pin pair.=0A= =0A= > reusing the generic priority getter for the new pin also inherits its=0A= > out-of-contract return value=0A= =0A= Resolved by the v9 priority-getter rework (see the patch 07 reply):=0A= the sentinel is gone; an untabled source reports the lowest valid slot.=0A= =0A= > is that model actually introduced here? [pins already registered earlier;= =0A= > bisect window with OOB indexing]=0A= =0A= Both points are addressed in v9: the INTSYNC pair is=0A= registered in this patch, together with the dedicated ops tables, so the=0A= "model" and its pins arrive as one unit and no earlier commit can dispatch= =0A= them to the generic tables; and the changelog is reworded accordingly.=0A=