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Tue, 15 Sep 2026 04:35:11 -0700 From: Tariq Toukan To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , , Paolo Abeni CC: Akiva Goldberger , Gal Pressman , Leon Romanovsky , open list , , Mark Bloch , Saeed Mahameed , Shay Drory , Tariq Toukan Subject: [PATCH net V3 0/3] net/mlx5: SD LAG and devcom stability fixes Date: Tue, 15 Sep 2026 14:34:56 +0300 Message-ID: <20260915113459.3934760-1-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0002992A:EE_|DS5PPFEAC589ED8:EE_ X-MS-Office365-Filtering-Correlation-Id: 83fdbf14-507f-45be-08d4-08df131d7cb9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|23010399003|82310400026|1800799024|13003099007|6133799003|10067099003|56012099006|11063799006|18002099003; X-Microsoft-Antispam-Message-Info: l2bb5Z58x1UtTPtZIwpJdiydp+nMtlbuT/JSzcyxViEBZMW1TAOLNxoA+QTyee9yBcb5s3+kPVeG36nV/PVyYF4NJW8zgTvPARQ59CIynqZ5NPGHW8raIVLrwqFEiN9R7CL9ibp+6+aVSXLRIZNeYUsS41H0H6iVUBnBqLZvCeJk6bHJz+o1IMedLZ/Xmb3+ZsZM8XmLXgHCpCRasOoaCz3IJyvhfL5XjhytZi178pPTLQ5vWRTbvOaiOCDKIQXdTdAi0lpub3ucGCRy1PQnEVQXXi3qGyPed8lDRu0F4vMgEZXQgIUb1Lq6FZjfj6xhH6Le7U0Xoycq0XSczXN3QVbObuhjpEvgehWb2jp/fst7DSbUXKcTY/zybjyDR9ZavXb5PSmp4auyuJyLt3ckJsLclnDZEY7i6380KKmTca5aDwZ0Y456HgArmP14Km0rjhsxb5KAmvloUNX0uDKE33swF84Aw8hgWkJE3D6fRjlBJx/E9RrLADkLtjzpZiMZhUNVG7kAj8xgnbQq02GaomBPQzwdGV5ms4jATSWPyKgtUbxasfsp9Cd/Cn91QP4IOlB8onVaQQohtZL9iqn88MhvBLpgNXvlwadkIoVgZM3wMNv2heC/Fjl+g7xNtD9r8plg9L53JuLf8/8qu+DXccgEysT8ZIHwXBR8s0w2iN/aigScT/ILW2I71etYxX24g73DH30haYU+nm7YzPYTSg== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(376014)(23010399003)(82310400026)(1800799024)(13003099007)(6133799003)(10067099003)(56012099006)(11063799006)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: RgjfPOc0NY1yPqAAzNtc13dMsqRbnoJOdA0NShZP49CJoZ8nDYh7X9eE7Mqxo1IL3E+tRlvWCVtHYzUzQykVSsPJCvCd4YauMlcWxvzgIljH2TYU1uhWwNxrfeDigxNdkrkO3WsPJR4eVc6lTBJ5Mz7lwOwarYd0KZwNDT9ytLyfcrLktaAM9yMPQQhyMLbogKRZanfgLBPU4vz76TuTenqpO7YBtJjb9hmozdgDsD/HWdedohwQNyAQFbyn1raPgbxi8KB5bAOPNa8QK69e/XmSTcYCTxXi6Fk4V/OCHB+GzlSpmPD+DEPd652yJ4aO/DReSYIGlpVEZCEn4UqbOjXYMYjMf8i3MlJfl/Oh6al5x0SG6q5P9WYjQAPz/jnKEsietCHPRuOKf+nJMYaWdz12ZEcYIIgxcafAB2MJ0zqfwB2A3iwHrlECHsu+qQET X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2026 11:35:47.5442 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 83fdbf14-507f-45be-08d4-08df131d7cb9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0002992A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS5PPFEAC589ED8 Hi, This series by Shay fixes four bugs in the Socket Direct LAG and devcom subsystems, all related to initialization/teardown ordering and concurrent access to the LAG device. Regards, Tariq Internal sashiko comment: > @@ -342,7 +342,14 @@ static void sd_lag_init(struct mlx5_core_dev *dev) > return; > } > > +recheck: > mutex_lock(&ldev->lock); > + if (ldev->mode_changes_in_progress) { > + mutex_unlock(&ldev->lock); > + msleep(100); > + goto recheck; > + } > + Does this open-coded retry loop reimplement a wait mechanism without immediate wakeups or fairness? It looks like we are polling the mode_changes_in_progress flag using a hard coded msleep(100). Could this unnecessarily delay the initialization path if the condition clears much sooner than 100ms? Would it be better to use a proper synchronization primitive like a waitqueue here instead of an ad-hoc flag loop? [SD] This is the same check as in mlx5_lag_remove_mdev(). I agree we need to change it, but this is net-next material V3: - Drop the "SD, serialize SD LAG init/cleanup against LAG mode changes" patch. - Elaborate the commit message in "net/mlx5: LAG, reload IB reps of LAG master before the rest". V2: https://lore.kernel.org/all/20260906071332.3759199-1-tariqt@nvidia.com/ Shay Drory (3): net/mlx5: devcom, Base component size on linked devices net/mlx5: SD, unload reps on shared FDB create error path net/mlx5: LAG, reload IB reps of LAG master before the rest .../net/ethernet/mellanox/mlx5/core/lag/lag.c | 44 ++++++++++++++----- .../mellanox/mlx5/core/lag/shared_fdb.c | 1 + .../ethernet/mellanox/mlx5/core/lib/devcom.c | 5 ++- 3 files changed, 37 insertions(+), 13 deletions(-) base-commit: 23ca4ddc4fce2c233a49e9fd34d4b5b02bd7324e -- 2.44.0