From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
To: Rosen Penev <rosenp@gmail.com>
Cc: linux-gpio@vger.kernel.org, Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Clark Williams <clrkwllms@kernel.org>,
Steven Rostedt <rostedt@goodmis.org>,
open list <linux-kernel@vger.kernel.org>,
"open list:Real-time Linux (PREEMPT_RT):Keyword:PREEMPT_RT"
<linux-rt-devel@lists.linux.dev>
Subject: Re: [PATCHv2] gpio: mvebu: keep resume masks within the irqchip cache
Date: Wed, 16 Sep 2026 08:55:23 +0200 [thread overview]
Message-ID: <20260916065523.ZJKAHHyW@linutronix.de> (raw)
In-Reply-To: <CAKxU2N_+H50zy7V0FR-_4KiyAG8+_x4kg2QZBsumHEXgdwmqKQ@mail.gmail.com>
On 2026-09-15 15:24:24 [-0700], Rosen Penev wrote:
> On Mon, Sep 14, 2026 at 11:43 PM Sebastian Andrzej Siewior
> <bigeasy@linutronix.de> wrote:
> >
> > On 2026-09-14 17:44:06 [-0700], Rosen Penev wrote:
> > > mvebu_gpio_resume() writes the edge/level mask registers saved at
> > > suspend time straight back to hardware, bypassing the irqchip's
> > > mask_cache_priv. genirq skips mask_irq() for a line it already
> > > considers masked, so restoring a bit in hardware that genirq thinks
> > > is still masked leaves that line unmasked behind genirq's back. An
> > > asserted level line then has nobody to ack it, and the moment
> > > interrupts are re-enabled the chained handler storms, hanging resume.
> >
> > Why is the mask value changed after suspend?
> In order to keep genirq and the hardware in sync.
There seems to be write after suspend took place or before resume.
Sebastian
prev parent reply other threads:[~2026-09-16 6:55 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 0:44 Rosen Penev
2026-09-15 0:57 ` sashiko-bot
2026-09-15 6:43 ` Sebastian Andrzej Siewior
2026-09-15 22:24 ` Rosen Penev
2026-09-16 6:55 ` Sebastian Andrzej Siewior [this message]
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