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From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
To: Rosen Penev <rosenp@gmail.com>
Cc: linux-gpio@vger.kernel.org, Linus Walleij <linusw@kernel.org>,
	Bartosz Golaszewski <brgl@kernel.org>,
	Clark Williams <clrkwllms@kernel.org>,
	Steven Rostedt <rostedt@goodmis.org>,
	open list <linux-kernel@vger.kernel.org>,
	"open list:Real-time Linux (PREEMPT_RT):Keyword:PREEMPT_RT"
	<linux-rt-devel@lists.linux.dev>
Subject: Re: [PATCH] gpio: mvebu: use raw spinlock for MMIO regmaps
Date: Wed, 16 Sep 2026 09:20:57 +0200	[thread overview]
Message-ID: <20260916072057.HeaSg_Ya@linutronix.de> (raw)
In-Reply-To: <20260915222609.194216-1-rosenp@gmail.com>

On 2026-09-15 15:26:09 [-0700], Rosen Penev wrote:
> The mask/unmask handlers run with the generic irqchip's raw spinlock
> held and call regmap_read()/regmap_write() on the GPIO regmaps. By
> default regmap protects itself with a plain spinlock, which becomes a
> sleeping rt_mutex on CONFIG_PREEMPT_RT; taking it while holding the raw
  sleeping lock

> irqchip lock trips might_sleep(), and PROVE_RAW_LOCK_NESTING flags the
> same nesting on non-RT builds.
> 
> Configure both GPIO regmaps with .use_raw_spinlock = true so the MMIO
> accesses stay atomic in hardirq and raw-locked context.
> 
> Assisted-by: LLM
> Signed-off-by: Rosen Penev <rosenp@gmail.com>
> ---

other than the comments,

Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>

>  drivers/gpio/gpio-mvebu.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
> index 03e977c2a629..674feeb31774 100644
> --- a/drivers/gpio/gpio-mvebu.c
> +++ b/drivers/gpio/gpio-mvebu.c
> @@ -598,11 +598,18 @@ static void mvebu_gpio_irq_handler(struct irq_desc *desc)
>  	chained_irq_exit(chip, desc);
>  }
>  
> +/*
> + * These regmaps are accessed from the mask/unmask handlers while the
> + * irqchip's raw spinlock is held, so they must use a raw spinlock
> + * internally. A plain spinlock becomes a sleeping rt_mutex on
> + * CONFIG_PREEMPT_RT and would trip might_sleep() from that context.
> + */

IRQ delivery path must hold raw_spinlock_t. This is not special to this
driver but must be done in every gpio chip. I wouldn't add this comment.

>  static const struct regmap_config mvebu_gpio_regmap_config = {
>  	.name = "gpio",
>  	.reg_bits = 32,
>  	.reg_stride = 4,
>  	.val_bits = 32,
> +	.use_raw_spinlock = true,
>  };
>  
>  static const struct regmap_config mvebu_gpio_percpu_regmap_config = {
> @@ -610,6 +617,7 @@ static const struct regmap_config mvebu_gpio_percpu_regmap_config = {
>  	.reg_bits = 32,
>  	.reg_stride = 4,
>  	.val_bits = 32,
> +	.use_raw_spinlock = true,
>  };
>  
>  static const struct regmap_config mvebu_pwm_regmap_config = {
> -- 
> 2.55.0

Sebastian

      reply	other threads:[~2026-09-16  7:21 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-15 22:26 Rosen Penev
2026-09-16  7:20 ` Sebastian Andrzej Siewior [this message]

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