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Wed, 16 Sep 2026 11:37:49 -0700 From: To: , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , , Subject: [PATCH v5 12/27] vfio/pci: Call the CXL open and close hooks around device use Date: Thu, 17 Sep 2026 00:05:25 +0530 Message-ID: <20260916183540.3813685-13-mhonap@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260916183540.3813685-1-mhonap@nvidia.com> References: <20260916183540.3813685-1-mhonap@nvidia.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail202.nvidia.com (10.129.68.7) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F42:EE_|LV8PR12MB9181:EE_ X-MS-Office365-Filtering-Correlation-Id: 53664b9e-b8d6-4335-9fd8-08df1421b4af X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|36860700016|1800799024|23010399003|82310400026|921020|10067099003|56012099006|11063799006|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: iHiThTU1ZNpswY/UAkQRAinVwzPo2rq3jqhd3HaXltTDe+eQBpgaBz/cObqWGMxfezOMlhfrQcepT4TvwPVUkYOfmJJQ8J6cjODczfGhxEcK2hpliB7pagrsoFMz5HU4Gai+/OobZlzuTRYLksfQONl5pPddGdEdyOfzsMkLACt2QfCn7ecCjrUc7trmprgsTarZfXqkLqT5qag7CJ6ekaw6uEn2J5/wbB+9lQqY44GHtTbkKnfFOIcSiiCJymk/NwK6mmH7SMcZu4z4Y/XcbV5ojknHFR7Ut3KtDr+5juSuxQvHuueXz6SIenUO1OAmEHPfCT522/P9TEPo/PcDKZs+2q+uP54+pSmnmh4Aix6N0Vpde90KRSwSSftM2keZz/laMBUBhs3HU8hawpAA5UeZ+FlDG8vzE4jqhfSV8vHIYFx8iHb6zOkWu+QNcjsb X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Sep 2026 18:38:30.6299 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 53664b9e-b8d6-4335-9fd8-08df1421b4af X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F42.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9181 From: Manish Honap Volatile CXL register state must be sampled from live hardware when the guest opens the device, not at bind, because a low-power transition between bind and open can leave the bind-time values stale. Add open and close to the CXL ops and call them from the common enable and close paths. A failed open unwinds the enable in reverse order: unmap the BARs, drop the excluded ranges, then free the virtual config. Factor the BAR unmap out of vfio_pci_core_disable() into a helper so the enable failure path and the disable path share it. Assisted-by: LLM Signed-off-by: Manish Honap --- drivers/vfio/pci/vfio_pci_core.c | 40 +++++++++++++++++++++++++------- include/linux/vfio_pci_core.h | 2 ++ 2 files changed, 33 insertions(+), 9 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c index c5b7a59a4548..2f593b2721a1 100644 --- a/drivers/vfio/pci/vfio_pci_core.c +++ b/drivers/vfio/pci/vfio_pci_core.c @@ -591,6 +591,21 @@ static const struct dev_pm_ops vfio_pci_core_pm_ops = { static void vfio_pci_free_excluded_ranges(struct vfio_pci_core_device *vdev); +static void vfio_pci_core_unmap_bars(struct vfio_pci_core_device *vdev) +{ + struct pci_dev *pdev = vdev->pdev; + int i, bar; + + for (i = 0; i < PCI_STD_NUM_BARS; i++) { + bar = i + PCI_STD_RESOURCES; + if (IS_ERR_OR_NULL(vdev->barmap[bar])) + continue; + pci_iounmap(pdev, vdev->barmap[bar]); + pci_release_selected_regions(pdev, 1 << bar); + vdev->barmap[bar] = NULL; + } +} + int vfio_pci_core_enable(struct vfio_pci_core_device *vdev) { struct pci_dev *pdev = vdev->pdev; @@ -683,8 +698,19 @@ int vfio_pci_core_enable(struct vfio_pci_core_device *vdev) vfio_pci_core_map_bars(vdev); + if (vdev->cxl_ops) { + ret = vdev->cxl_ops->open_device(vdev); + if (ret) + goto out_free_config; + } + return 0; +out_free_config: + /* A failed first open never reaches vfio_pci_core_disable(). */ + vfio_pci_core_unmap_bars(vdev); + vfio_pci_free_excluded_ranges(vdev); + vfio_config_free(vdev); out_free_zdev: vfio_pci_zdev_close_device(vdev); out_free_state: @@ -705,7 +731,7 @@ void vfio_pci_core_disable(struct vfio_pci_core_device *vdev) struct pci_dev *pdev = vdev->pdev; struct vfio_pci_dummy_resource *dummy_res, *tmp; struct vfio_pci_ioeventfd *ioeventfd, *ioeventfd_tmp; - int i, bar; + int i; /* For needs_reset */ lockdep_assert_held(&vdev->vdev.dev_set->lock); @@ -761,14 +787,7 @@ void vfio_pci_core_disable(struct vfio_pci_core_device *vdev) vfio_config_free(vdev); vfio_pci_free_excluded_ranges(vdev); - for (i = 0; i < PCI_STD_NUM_BARS; i++) { - bar = i + PCI_STD_RESOURCES; - if (IS_ERR_OR_NULL(vdev->barmap[bar])) - continue; - pci_iounmap(pdev, vdev->barmap[bar]); - pci_release_selected_regions(pdev, 1 << bar); - vdev->barmap[bar] = NULL; - } + vfio_pci_core_unmap_bars(vdev); list_for_each_entry_safe(dummy_res, tmp, &vdev->dummy_resources_list, res_next) { @@ -851,6 +870,9 @@ void vfio_pci_core_close_device(struct vfio_device *core_vdev) #endif vfio_pci_dma_buf_cleanup(vdev); + if (vdev->cxl_ops) + vdev->cxl_ops->close_device(vdev); + vfio_pci_core_disable(vdev); mutex_lock(&vdev->igate); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index e8a1fc398571..643f32c2141f 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -70,6 +70,8 @@ struct vfio_pci_device_ops { struct vfio_cxl_ops { int (*init)(struct vfio_pci_core_device *vdev); void (*release)(struct vfio_pci_core_device *vdev); + int (*open_device)(struct vfio_pci_core_device *vdev); + void (*close_device)(struct vfio_pci_core_device *vdev); /* Pinned per bound CXL device so vfio-cxl cannot unload under usage */ struct module *owner; }; -- 2.25.1