From: Sarath Ganapathiraju via B4 Relay <devnull+sarath.ganapathiraju.oss.qualcomm.com@kernel.org>
To: andersson@kernel.org, abelvesa@kernel.org, sboyd@kernel.org,
bmasney+clk@redhat.com, jbrunet+clk@baylibre.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
srinivas.kandagatla@oss.qualcomm.com,
sarath.ganapathiraju@oss.qualcomm.com
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
prasad.kumpatla@oss.qualcomm.com
Subject: [PATCH v8 1/2] dt-bindings: clock: qcom: Add LPASS VA CSR HeartBeat pulse clock
Date: Thu, 17 Sep 2026 19:27:14 +0530 [thread overview]
Message-ID: <20260917-master-v8-1-823d2c5d090a@oss.qualcomm.com> (raw)
In-Reply-To: <20260917-master-v8-0-823d2c5d090a@oss.qualcomm.com>
From: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com>
Add a binding for the Qualcomm LPASS VA CSR rate generator node that
exposes the lpass_heartbeat_pulse clock on Hawi.
The HeartBeat Pulse, also known as RateGen Pulse, synchronizes the
start of DMAs and Codec Interfaces for the audio usecase and can serve
as a periodic wakeup source for the DSP.
Require the LPASS LPR and audio vote clocks to access VA CSR register
space safely.
Signed-off-by: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com>
---
.../bindings/clock/qcom,hawi-lpass-va-csr.yaml | 62 ++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,hawi-lpass-va-csr.yaml b/Documentation/devicetree/bindings/clock/qcom,hawi-lpass-va-csr.yaml
new file mode 100644
index 000000000000..601da83add2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,hawi-lpass-va-csr.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,hawi-lpass-va-csr.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm LPASS VA CSR heartbeat pulse clock provider
+
+maintainers:
+ - Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
+ - Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com>
+
+description:
+ The Hawi LPASS (Low Power Audio Subsystem) VA CSR block contains a
+ rate generator that produces a periodic HeartBeat Pulse, also known
+ as the RateGen Pulse. This pulse synchronizes the start of DMAs and
+ Codec Interfaces for audio usecases and can serve as a periodic wakeup
+ source for the DSP.
+
+properties:
+ compatible:
+ enum:
+ - qcom,hawi-lpass-va-csr
+
+ reg:
+ maxItems: 1
+ description: Address and size of the VA CSR register block.
+
+ clocks:
+ items:
+ - description: LPASS LPR (Low Power Resource) voting clock
+ - description: LPASS Audio voting clock
+
+ clock-names:
+ items:
+ - const: lpr
+ - const: audio
+
+ "#clock-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
+
+ clock-controller@7ee0000 {
+ compatible = "qcom,hawi-lpass-va-csr";
+ reg = <0x07ee0000 0xe000>;
+ clocks = <&q6prmcc LPASS_HW_LPR_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "lpr", "audio";
+ #clock-cells = <0>;
+ };
--
2.34.1
next prev parent reply other threads:[~2026-09-17 13:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 13:57 [PATCH v8 0/2] Add LPASS VA CSR HeartBeat pulse clock support Sarath Ganapathiraju via B4 Relay
2026-09-17 13:57 ` Sarath Ganapathiraju via B4 Relay [this message]
2026-09-17 13:57 ` [PATCH v8 2/2] clk: qcom: Add LPASS VA CSR heartbeat pulse clock Sarath Ganapathiraju via B4 Relay
2026-09-17 16:08 ` Srinivas Kandagatla
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