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[2a02:3100:9dc6:c001:54ee:4741:4927:a28]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49fbd23f4e6sm55558105e9.8.2026.09.16.23.15.42 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 16 Sep 2026 23:15:43 -0700 (PDT) From: Karl Mehltretter To: Stephen Boyd , Ryan Chen Cc: Karl Mehltretter , Joel Stanley , Brian Masney , Andrew Jeffery , linux-clk@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jerome Brunet Subject: Re: [PATCH] clk: aspeed: ast2700: select AUXILIARY_BUS Date: Thu, 17 Sep 2026 08:15:39 +0200 Message-Id: <20260917061539.51943-1-kmehltretter@gmail.com> X-Mailer: git-send-email 2.39.5 (Apple Git-154) In-Reply-To: <20260712160301.98941-1-kmehltretter@gmail.com> References: <20260712160301.98941-1-kmehltretter@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On Sun, 12 Jul 2026 18:03:01 +0200, I wrote: > Select AUXILIARY_BUS directly, as other clock drivers that create > auxiliary devices do, so it builds regardless of the reset driver. Friendly ping on this patch. It already has two Reviewed-by tags. Adding the new clk co-maintainer addresses to Cc. Is anything else needed from my side before this can be picked up? Thanks, Karl