From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 05E9D49CF56; Thu, 17 Sep 2026 10:20:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789640430; cv=none; b=Y6jkEnmAx0DCeWiTL0LcXEX2CdI+0gxIAUU1//Hm9GSbuAkKOQ6/Gwqwb/bmOrSQvpFnh8wjpsrHJxkemOFK+i2RI4M2uDSo3yVG3rnxgc2DimCzKOcaxoIRTsMI52zHckmmZC8A1flUl1W/7R+BJ+yMWBHPhkax2laKEOAKpek= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789640430; c=relaxed/simple; bh=wi6a4vrcEURBwIvVtHSK7w2RA9Auyxpst2/3rYf4q4c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HPtJBYZ3v+eUJmRqn5wUm66P8qv8Hgvg+vYkhZr799SsS2TF6y/0qOGvAVbra8ISLVsre4yK6MFJ8de91r9SWWSIbscuAYCrQRjybHrR/BGnARvWkURG1dcVM2IVb17cstp35wDDT3cGom3S9G65gXlJiLwGzGeNtrvFU3RvacU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=QtrHiC+g; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="QtrHiC+g" Received: from francesco-nb.. (xcpe-178-82-167-143.dyn.res.sunrise.net [178.82.167.143]) by mail11.truemail.it (Postfix) with ESMTPA id 48E1022817; Thu, 17 Sep 2026 12:20:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1789640420; bh=0ikBJI2pRib3gZIigxvi/oduYd44RUm0tpdFXXdsOjs=; h=From:To:Subject; b=QtrHiC+gdPJB4dC6iAKxqU46JzQU/0h9yG8ox7BGAoMCXKe2kxYzzuDNmV1mt195i LSfVqK4ID8Tirf8azyvswH/YD70V8/n89dBlzYw73Ywo5COo6ZJB2j3kbCa5e3bcu5 ArXdYJAFcZxk4ziEVR6R3nwofOJqQHPC+yMfMmaqe9HMpXb23orAe4baVDtCUhMyHG tDPrUCnh3sAyY3TrnNgI0T/OGLtHvMeaB7WTTMd2OP2ZQ4KQBH5Czd0Y1i0URfW+ZC RYrbd62B3Wfvu9GwBb4uxdZC77YnS7UzsaJyRoE4c3sbV4zPtHg3G5afJbHbqB9KsQ HuN7NmHXz2wHQ== From: Francesco Dolcini To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Shawn Guo Cc: Antoine Gouby , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Franz Schnyder , Francesco Dolcini Subject: [PATCH v2 2/2] arm64: dts: freescale: Add Toradex OSM iMX95 Date: Thu, 17 Sep 2026 12:20:09 +0200 Message-ID: <20260917102011.69071-3-francesco@dolcini.it> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260917102011.69071-1-francesco@dolcini.it> References: <20260917102011.69071-1-francesco@dolcini.it> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Antoine Gouby Add support for the Toradex OSM iMX95 SoM, based on an NXP i.MX95 SoC, and its OSM development carrier board. Link: https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx95 Link: https://www.toradex.com/products/carrier-board/osm-development-board Co-developed-by: Franz Schnyder Signed-off-by: Franz Schnyder Signed-off-by: Antoine Gouby Signed-off-by: Francesco Dolcini --- v2: removed unused pinctrl_pcie_wake from PCIe nodes --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx95-toradex-osm-dev.dts | 404 +++++++ .../boot/dts/freescale/imx95-toradex-osm.dtsi | 1032 +++++++++++++++++ 3 files changed, 1437 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx95-toradex-osm-dev.dts create mode 100644 arch/arm64/boot/dts/freescale/imx95-toradex-osm.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 7944e3b32513..6ec0aff332ac 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -955,6 +955,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-sof.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-frdm-pro.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-aquila-clover.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-aquila-dev.dtb +dtb-$(CONFIG_ARCH_MXC) += imx95-toradex-osm-dev.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-toradex-smarc-dev.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-tqma9596la-mba95xxca.dtb dtb-$(CONFIG_ARCH_MXC) += imx95-tqma9596sa-mb-smarc-2.dtb diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-osm-dev.dts b/arch/arm64/boot/dts/freescale/imx95-toradex-osm-dev.dts new file mode 100644 index 000000000000..b3d54be07c43 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx95-toradex-osm-dev.dts @@ -0,0 +1,404 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (c) Toradex + * + * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx95 + * https://www.toradex.com/products/carrier-board/osm-development-board + */ + +/dts-v1/; + +#include +#include +#include +#include "imx95-toradex-osm.dtsi" + +/ { + model = "Toradex OSM iMX95 on OSM Development Board"; + compatible = "toradex,osm-imx95-dev", + "toradex,osm-imx95", + "fsl,imx95"; + + aliases { + eeprom1 = &carrier_eeprom; + }; + + reg_carrier_1p8v: regulator-carrier-1p8v { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "On-carrier 1V8"; + }; + + sfp: sfp { + compatible = "sff,sfp"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_b0>, <&pinctrl_gpio_b1>, + <&pinctrl_gpio_b2>, <&pinctrl_gpio_b3>; + i2c-bus = <&i2c_mux_carrier_sfp>; + los-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + maximum-power-milliwatt = <3000>; + mod-def0-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + rate-select0-gpios = <&som_gpio_expander_0 4 GPIO_ACTIVE_HIGH>; + rate-select1-gpios = <&som_gpio_expander_1 3 GPIO_ACTIVE_HIGH>; + tx-disable-gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>; + tx-fault-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,name = "verdin-wm8904"; + simple-audio-card,routing = + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "Microphone Jack", "MICBIAS", + "IN1L", "Microphone Jack"; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + clocks = <&scmi_clk IMX95_CLK_SAI3>; + sound-dai = <&wm8904_1a>; + }; + + simple-audio-card,cpu { + sound-dai = <&sai3>; + }; + }; +}; + +/* OSM ADC_0, ADC_1 */ +&adc1 { + status = "okay"; +}; + +/* OSM ETH_A */ +&enetc_port0 { + phy-handle = <ðphy_a>; + phy-mode = "rgmii-id"; + + status = "okay"; +}; + +/* OSM ETH_B */ +&enetc_port1 { + phy-handle = <ðphy_b>; + phy-mode = "rgmii-id"; + + status = "okay"; +}; + +/* OSM ETH_C */ +&enetc_port2 { + managed = "in-band-status"; + phy-mode = "10gbase-r"; + sfp = <&sfp>; + + status = "okay"; +}; + +/* OSM CAN_A */ +&flexcan2 { + status = "okay"; +}; + +/* OSM CAN_B */ +&flexcan3 { + status = "okay"; +}; + +&gpio5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_a1>, <&pinctrl_gpio_a2>, <&pinctrl_gpio_a3>, + <&pinctrl_gpio_a4>, <&pinctrl_gpio_a5>, <&pinctrl_gpio_a6>; +}; + +/* OSM I2C_A */ +&lpi2c1 { + status = "okay"; + + fan_controller: fan-controller@19 { + compatible = "ti,amc6821"; + reg = <0x19>; + #pwm-cells = <2>; + + fan { + cooling-levels = <255>; + pwms = <&fan_controller 40000 PWM_POLARITY_INVERTED>; + }; + }; + + wm8904_1a: audio-codec@1a { + compatible = "wlf,wm8904"; + reg = <0x1a>; + clocks = <&scmi_clk IMX95_CLK_SAI3>; + clock-names = "mclk"; + #sound-dai-cells = <0>; + AVDD-supply = <®_carrier_1p8v>; + CPVDD-supply = <®_carrier_1p8v>; + DBVDD-supply = <®_carrier_1p8v>; + DCVDD-supply = <®_carrier_1p8v>; + MICVDD-supply = <®_carrier_1p8v>; + }; + + gpio@20 { + compatible = "nxp,pcal6408"; + reg = <0x20>; + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = + "PWR_CTRL_CAN_A", /* 0 */ + "PWR_CTRL_CAN_B", + "PWR_CTRL_USB-HUB", + "LVDS_MUX_CTRL", + "USB_MUX_CTRL", + "I2CA_IOEXP_P5", + "I2CA_IOEXP_P6", + "I2CA_IOEXP_P7"; + + lvds_mux_ctrl: lvds-mux-ctrl-hog { + gpio-hog; + gpios = <3 GPIO_ACTIVE_HIGH>; + line-name = "LVDS_MUX_CTRL"; + output-low; + }; + + usb_mux_ctrl: usb-mux-ctrl-hog { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + line-name = "USB_MUX_CTRL"; + output-high; + }; + }; + + power-monitor@40 { + compatible = "ti,ina219"; + reg = <0x40>; + shunt-resistor = <10000>; + }; + + temperature-sensor@4f { + compatible = "ti,tmp1075"; + reg = <0x4f>; + }; + + tcpc@52 { + compatible = "nxp,ptn5110", "tcpci"; + reg = <0x52>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_a0>; + interrupt-parent = <&gpio5>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + + connector { + compatible = "usb-c-connector"; + data-role = "dual"; + label = "USB_A"; + op-sink-microwatt = <0>; + power-role = "dual"; + try-power-role = "sink"; + self-powered; + sink-pdos = ; + source-pdos = ; + + port { + usb_c_a_conn_hs: endpoint { + remote-endpoint = <&usb_a_hs>; + }; + }; + }; + }; + + carrier_eeprom: eeprom@57 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x57>; + pagesize = <16>; + }; +}; + +/* OSM I2C_B */ +&lpi2c5 { + status = "okay"; + + i2c-mux@70 { + compatible = "nxp,pca9548"; + reg = <0x70>; + #address-cells = <1>; + #size-cells = <0>; + + i2c_mux_carrier_cam_a: i2c@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c_mux_carrier_lvds: i2c@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* I2C on DSI connector pin #4 and #6 */ + i2c_mux_carrier_dsi_1: i2c@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* I2C on DSI connector pin #52 and #54 */ + i2c_mux_carrier_dsi_2: i2c@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c_mux_carrier_cam_b: i2c@4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c_mux_carrier_sfp: i2c@5 { + reg = <5>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; +}; + +/* OSM SPI_A */ +&lpspi4 { + status = "okay"; +}; + +/* OSM UART_CON, used as the Linux Console */ +&lpuart1 { + status = "okay"; +}; + +/* OSM UART_D */ +&lpuart2 { + status = "okay"; +}; + +/* OSM UART_C */ +&lpuart3 { + status = "okay"; +}; + +/* OSM UART_B */ +&lpuart5 { + status = "okay"; +}; + +/* OSM UART_A */ +&lpuart6 { + status = "okay"; +}; + +&netc_blk_ctrl { + status = "okay"; +}; + +/* OSM MDIO, shared between all ethernet ports */ +&netc_emdio { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio>; + + status = "okay"; + + ethphy_a: ethernet-phy@2 { + reg = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_a7>; + interrupt-parent = <&gpio1>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + }; + + ethphy_b: ethernet-phy@3 { + reg = <3>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + }; +}; + +&netc_timer { + status = "okay"; +}; + +&netcmix_blk_ctrl { + status = "okay"; +}; + +&pcie0 { + status = "okay"; +}; + +&pcie1 { + status = "okay"; +}; + +/* OSM I2S_A */ +&sai3 { + status = "okay"; +}; + +/* OSM PWM_0 */ +&tpm3 { + status = "okay"; +}; + +/* OSM PWM_1 */ +&tpm4 { + status = "okay"; +}; + +/* OSM PWM_2 */ +&tpm5 { + status = "okay"; +}; + +/* OSM PWM_3 */ +&tpm6 { + status = "okay"; +}; + +/* OSM USB_A */ +&usb2 { + status = "okay"; + + port { + usb_a_hs: endpoint { + remote-endpoint = <&usb_c_a_conn_hs>; + }; + }; +}; + +/* OSM USB_C */ +&usb3 { + status = "okay"; +}; + +&usb3_phy { + status = "okay"; +}; + +/* OSM SDIO_A */ +&usdhc2 { + status = "okay"; +}; + +/* OSM SDIO_B */ +&usdhc3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-osm.dtsi b/arch/arm64/boot/dts/freescale/imx95-toradex-osm.dtsi new file mode 100644 index 000000000000..8eb7ea4ed9ee --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx95-toradex-osm.dtsi @@ -0,0 +1,1032 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (c) Toradex + * + * Toradex OSM iMX95 SoM + * + * https://www.toradex.com/computer-on-modules/osm-arm-family/nxp-imx95 + */ + +#include "imx95.dtsi" + +/ { + aliases { + can0 = &flexcan2; + can1 = &flexcan3; + eeprom0 = &som_eeprom; + ethernet0 = &enetc_port0; + ethernet1 = &enetc_port1; + ethernet2 = &enetc_port2; + i2c0 = &lpi2c3; + i2c1 = &lpi2c1; + i2c2 = &lpi2c5; + mmc0 = &usdhc1; + mmc1 = &usdhc2; + mmc2 = &usdhc3; + rtc0 = &rtc_i2c; + rtc1 = &scmi_bbm; + serial0 = &lpuart1; + serial1 = &lpuart6; + serial2 = &lpuart5; + serial3 = &lpuart3; + serial4 = &lpuart2; + usb0 = &usb2; + usb1 = &usb3; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + clk_serdes_eth_ref: clock-eth-ref { + compatible = "gpio-gate-clock"; + #clock-cells = <0>; + /* CTRL_ETH_REF_CLK_STBY# */ + enable-gpios = <&som_gpio_expander_0 13 GPIO_ACTIVE_HIGH>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <1800000>; + regulator-name = "On-module +V1.8"; + }; + + reg_usb_a_vbus: regulator-usb-a-vbus { + compatible = "regulator-fixed"; + /* OSM USB_A_EN (OSM_AC16) */ + gpios = <&som_gpio_expander_0 0 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "USB_A_EN"; + }; + + reg_usb_c_vbus: regulator-usb-c-vbus { + compatible = "regulator-fixed"; + /* OSM USB_C_EN (OSM_C10) */ + gpios = <&som_gpio_expander_0 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name = "USB_C_EN"; + }; + + reg_sdio_a_vmmc: regulator-usdhc2-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdio_a_pwr_en>; + gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + off-on-delay-us = <100000>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "SDIO_A_PWR_EN"; + startup-delay-us = <20000>; + }; + + reg_sdio_a_vqmmc: regulator-usdhc2-vqmmc { + compatible = "regulator-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdio_a_vsel>; + gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-name = "PMIC_SDIO_A_VSEL"; + states = <1800000 0x1>, <3300000 0x0>; + }; + + remoteproc-cm7 { + compatible = "fsl,imx95-cm7"; + mbox-names = "tx", "rx", "rxdb"; + mboxes = <&mu7 0 1 &mu7 1 1 &mu7 3 1>; + memory-region = <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>, + <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>, <&m7_reserved>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + linux_cma: linux,cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0 0x80000000 0 0x7f000000>; + linux,cma-default; + reusable; + size = <0 0x3c000000>; + }; + + m7_reserved: memory@80000000 { + reg = <0 0x80000000 0 0x1000000>; + no-map; + }; + + vdev0vring0: vdev0vring0@88000000 { + reg = <0 0x88000000 0 0x8000>; + no-map; + }; + + vdev0vring1: vdev0vring1@88008000 { + reg = <0 0x88008000 0 0x8000>; + no-map; + }; + + vdev1vring0: vdev1vring0@88010000 { + reg = <0 0x88010000 0 0x8000>; + no-map; + }; + + vdev1vring1: vdev1vring1@88018000 { + reg = <0 0x88018000 0 0x8000>; + no-map; + }; + + vdev0buffer: vdev0buffer@88020000 { + compatible = "shared-dma-pool"; + reg = <0 0x88020000 0 0x100000>; + no-map; + }; + + rsc_table: rsc-table@88220000 { + reg = <0 0x88220000 0 0x1000>; + no-map; + }; + }; +}; + +/* OSM ADC_0, ADC_1 */ +&adc1 { + vref-supply = <®_1p8v>; +}; + +/* OSM ETH_A */ +&enetc_port0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth_a>; +}; + +/* OSM ETH_B */ +&enetc_port1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eth_b>; +}; + +/* OSM ETH_C */ +&enetc_port2 { + clocks = <&clk_serdes_eth_ref>; + clock-names = "ref"; +}; + +/* OSM CAN_A */ +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_a>; +}; + +/* OSM CAN_B */ +&flexcan3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_can_b>; +}; + +&gpio1 { + gpio-line-names = + "OSM_AA15", /* 0 */ + "OSM_AA16", + "", + "", + "", + "", + "", + "", + "OSM_F19", + "OSM_AA23", + "OSM_G19", /* 10 */ + "OSM_L17"; /* OSM GPIO_A_7/SPI_B_CS1# */ + + status = "okay"; +}; + +&gpio2 { + gpio-line-names = + "", /* 0 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 20 */ + "", + "OSM_AA21", + "OSM_AA20", + "", + "", + "", + "", + "I2C_SOM_SDA", + "I2C_SOM_SCL"; +}; + +&gpio3 { + gpio-line-names = + "OSM_J21", /* 0 */ + "", + "", + "", + "", + "", + "", + "OSM_D21", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "", + "PMIC_SDIO_A_VSEL"; +}; + +&gpio4 { + gpio-line-names = + "", /* 0 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "CTRL_GPIO_EXP_INT#", + "OSM_T2"; +}; + +&gpio5 { + gpio-line-names = + "OSM_D17", /* OSM GPIO_A_0 */ + "OSM_E17", /* OSM GPIO_A_1 */ + "OSM_F17", /* OSM GPIO_A_2 */ + "OSM_G17", /* OSM GPIO_A_3 */ + "", + "", + "", + "", + "OSM_E19", + "OSM_H17", /* OSM GPIO_A_4 */ + "OSM_J17", /* OSM GPIO_A_5 */ + "OSM_D19", + "", + "OSM_K17", /* OSM GPIO_A_6/SPI_A_CS1# */ + "OSM_Y15"; +}; + +/* OSM I2C_A */ +&lpi2c1 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c_a>; + pinctrl-1 = <&pinctrl_i2c_a_gpio>; + clock-frequency = <100000>; + scl-gpios = <&gpio1 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +/* I2C_SOM */ +&lpi2c3 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c_som>, <&pinctrl_ctrl_gpio_exp_int>; + pinctrl-1 = <&pinctrl_i2c_som_gpio>, <&pinctrl_ctrl_gpio_exp_int>; + clock-frequency = <400000>; + scl-gpios = <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + + status = "okay"; + + som_gpio_expander_0: gpio@20 { + compatible = "nxp,pcal6416"; + reg = <0x20>; + #interrupt-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio4>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = + "OSM_AC16", /* 0 */ + "OSM_AC15", + "OSM_C10", + "OSM_C8", + "OSM_H19", /* OSM GPIO_B_4 */ + "OSM_J19", /* OSM GPIO_B_5 */ + "OSM_K19", /* OSM GPIO_B_6 */ + "OSM_L19", /* OSM GPIO_B_7 */ + "OSM_V2", + "OSM_L33", + "OSM_AN23", /* 10 */ + "OSM_AN14", + "USB_RECOVERY_CTRL#", + "CTRL_ETH_REF_CLK_STBY#", + "CTRL_DSI_EN/CSI_EN#", + "SPI_B_TPM_CS#"; + + /* + * Switch USB to default position: + * - SoC USB2 -> OSM USB_A + * - SoC USB1 -> OSM USB_C + * Reset configuration: + * - SoC USB1 -> OSM USB_A (USB recovery) + * - SoC USB2 not connected + */ + usb_recov_ctrl: usb-recov-ctrl-hog { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + line-name = "USB_RECOVERY_CTRL#"; + output-high; + }; + }; + + som_gpio_expander_1: gpio@21 { + compatible = "nxp,pcal6416"; + reg = <0x21>; + #interrupt-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio4>; + interrupts = <14 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells = <2>; + gpio-controller; + gpio-line-names = + "OSM_D3", /* OSM GPIO_C_0 */ + "OSM_D4", /* OSM GPIO_C_1 */ + "OSM_E3", /* OSM GPIO_C_2/CAM_B_PWR */ + "OSM_E4", /* OSM GPIO_C_3/CAM_B_RST# */ + "OSM_F3", /* OSM GPIO_C_4/DISP_VDD_EN */ + "OSM_F4", /* OSM GPIO_C_5/DISP_BL_EN */ + "OSM_G3", /* OSM GPIO_C_6/CAM_A_PWR */ + "OSM_G4", /* OSM GPIO_C_7/CAM_A_RST# */ + "OSM_U32", + "OSM_U33", + "OSM_V32", /* 10 */ + "OSM_V33", + "OSM_W32", + "OSM_W33", + "OSM_Y32", + "OSM_Y33"; + }; + + rtc_i2c: rtc@32 { + compatible = "epson,rx8130"; + reg = <0x32>; + }; + + temperature-sensor@48 { + compatible = "ti,tmp1075"; + reg = <0x48>; + }; + + som_eeprom: eeprom@50 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x50>; + pagesize = <16>; + }; +}; + +/* OSM I2C_B */ +&lpi2c5 { + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&pinctrl_i2c_b>; + pinctrl-1 = <&pinctrl_i2c_b_gpio>; + clock-frequency = <100000>; + scl-gpios = <&gpio2 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio2 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +/* OSM SPI_B */ +&lpspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi_b>, <&pinctrl_spi_b_cs0_gpio>; + cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>, + <&som_gpio_expander_0 15 GPIO_ACTIVE_LOW>; + + status = "okay"; + + som_tpm: tpm@1 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; + reg = <0x1>; + /* + * Maximum TPM-supported speed is 18.5 MHz, limited to 12 MHz + * here as lpspi1's per-clock (twice the max speed) is 24 MHz + */ + spi-max-frequency = <12000000>; + }; +}; + +/* OSM SPI_A */ +&lpspi4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi_a>, <&pinctrl_spi_a_cs0_gpio>; + cs-gpios = <&gpio5 14 GPIO_ACTIVE_LOW>; +}; + +/* OSM UART_CON, used as the Linux Console */ +&lpuart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart_con>; +}; + +/* OSM UART_D */ +&lpuart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart_d>; +}; + +/* OSM UART_C */ +&lpuart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart_c>; +}; + +/* OSM UART_B */ +&lpuart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart_b>; + uart-has-rtscts; +}; + +/* OSM UART_A */ +&lpuart6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart_a>; + uart-has-rtscts; +}; + +&mu7 { + status = "okay"; +}; + +/* OSM PCIE_A */ +&pcie0 { + /* PCIE_A_PERST# (OSM V2) */ + reset-gpios = <&som_gpio_expander_0 8 GPIO_ACTIVE_LOW>; +}; + +/* OSM PCIE_B */ +&pcie1 { + /* PCIE_B_PERST# (OSM L33) */ + reset-gpios = <&som_gpio_expander_0 9 GPIO_ACTIVE_LOW>; +}; + +/* OSM I2S_A */ +&sai3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_a>, <&pinctrl_i2s_mclk>; + assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, + <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, + <&scmi_clk IMX95_CLK_AUDIOPLL1>, + <&scmi_clk IMX95_CLK_AUDIOPLL2>, + <&scmi_clk IMX95_CLK_SAI3>; + assigned-clock-parents = <0>, <0>, <0>, <0>, + <&scmi_clk IMX95_CLK_AUDIOPLL1>; + assigned-clock-rates = <3932160000>, + <3612672000>, + <393216000>, + <361267200>, + <12288000>; + #sound-dai-cells = <0>; + fsl,sai-mclk-direction-output; +}; + +/* OSM I2S_B */ +&sai5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2s_b>; + assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, + <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, + <&scmi_clk IMX95_CLK_AUDIOPLL1>, + <&scmi_clk IMX95_CLK_AUDIOPLL2>, + <&scmi_clk IMX95_CLK_SAI5>; + assigned-clock-parents = <0>, <0>, <0>, <0>, + <&scmi_clk IMX95_CLK_AUDIOPLL1>; + assigned-clock-rates = <3932160000>, + <3612672000>, + <393216000>, + <361267200>, + <12288000>; + #sound-dai-cells = <0>; + fsl,sai-mclk-direction-output; +}; + +&scmi_bbm { + linux,code = ; +}; + +&thermal_zones { + /* PF09 Main PMIC */ + pf09-thermal { + polling-delay = <2000>; + polling-delay-passive = <250>; + thermal-sensors = <&scmi_sensor 2>; + + trips { + trip0 { + hysteresis = <2000>; + temperature = <155000>; + type = "critical"; + }; + }; + }; + + /* PF53 VDD_ARM PMIC */ + pf53-arm-thermal { + polling-delay = <2000>; + polling-delay-passive = <250>; + thermal-sensors = <&scmi_sensor 4>; + + trips { + trip0 { + hysteresis = <2000>; + temperature = <155000>; + type = "critical"; + }; + }; + }; + + /* PF53 VDD_SOC PMIC */ + pf53-soc-thermal { + polling-delay = <2000>; + polling-delay-passive = <250>; + thermal-sensors = <&scmi_sensor 3>; + + trips { + trip0 { + hysteresis = <2000>; + temperature = <155000>; + type = "critical"; + }; + }; + }; +}; + +/* OSM PWM_0 */ +&tpm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0>; +}; + +/* OSM PWM_1 */ +&tpm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; +}; + +/* OSM PWM_2 */ +&tpm5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; +}; + +/* OSM PWM_3 */ +&tpm6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; +}; + +/* OSM USB_A */ +&usb2 { + adp-disable; + disable-over-current; + dr_mode = "otg"; + hnp-disable; + srp-disable; + usb-role-switch; + vbus-supply = <®_usb_a_vbus>; +}; + +/* OSM USB_C */ +&usb3 { + fsl,disable-port-power-control; +}; + +&usb3_dwc3 { + dr_mode = "host"; +}; + +&usb3_phy { + vbus-supply = <®_usb_c_vbus>; +}; + +/* On-module eMMC */ +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_emmc>; + pinctrl-1 = <&pinctrl_emmc>; + pinctrl-2 = <&pinctrl_emmc_200mhz>; + no-sd; + no-sdio; + non-removable; + + status = "okay"; +}; + +/* OSM SDIO_A */ +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 = <&pinctrl_sdio_a>, <&pinctrl_sdio_a_cd>; + pinctrl-1 = <&pinctrl_sdio_a>, <&pinctrl_sdio_a_cd>; + pinctrl-2 = <&pinctrl_sdio_a_200mhz>, <&pinctrl_sdio_a_cd>; + pinctrl-3 = <&pinctrl_sdio_a_sleep>, <&pinctrl_sdio_a_cd>; + cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; + disable-wp; + vmmc-supply = <®_sdio_a_vmmc>; + vqmmc-supply = <®_sdio_a_vqmmc>; +}; + +/* OSM SDIO_B */ +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_sdio_b>; + pinctrl-1 = <&pinctrl_sdio_b>; + pinctrl-2 = <&pinctrl_sdio_b_200mhz>; + disable-wp; +}; + +&wdog3 { + fsl,ext-reset-output; + + status = "okay"; +}; + +&scmi_iomuxc { + /* OSM MDIO, shared between all ethernet ports */ + pinctrl_mdio: emdiogrp { + fsl,pins = , /* OSM T16 */ + ; /* OSM T15 */ + }; + + /* OSM ETH_A */ + pinctrl_eth_a: enetc0grp { + fsl,pins = , /* OSM K16 */ + , /* OSM J15 */ + , /* OSM H15 */ + , /* OSM G15 */ + , /* OSM H16 */ + , /* OSM G16 */ + , /* OSM M15 */ + , /* OSM R15 */ + , /* OSM K15 */ + , /* OSM L15 */ + , /* OSM N15 */ + ; /* OSM P15 */ + }; + + /* OSM ETH_B */ + pinctrl_eth_b: enetc1grp { + fsl,pins = , /* OSM J2 */ + , /* OSM H1 */ + , /* OSM G1 */ + , /* OSM F1 */ + , /* OSM G2 */ + , /* OSM F2 */ + , /* OSM L1 */ + , /* OSM P1 */ + , /* OSM J1 */ + , /* OSM K1 */ + , /* OSM M1 */ + ; /* OSM N1 */ + }; + + /* OSM CAN_A */ + pinctrl_can_a: flexcan2grp { + fsl,pins = , /* OSM AC17 */ + ; /* OSM AB17 */ + }; + + /* OSM CAN_B */ + pinctrl_can_b: flexcan3grp { + fsl,pins = , /* OSM AC19 */ + ; /* OSM AB19 */ + }; + + /* OSM GPIO_B_2 */ + pinctrl_gpio_b2: gpio1io8grp { + fsl,pins = ; /* OSM F19 */ + }; + + /* OSM SPI_B_CS0# */ + pinctrl_spi_b_cs0_gpio: gpio1io9grp { + fsl,pins = ; /* OSM AA23 */ + }; + + /* OSM GPIO_B_3 */ + pinctrl_gpio_b3: gpio1io10grp { + fsl,pins = ; /* OSM G19 */ + }; + + /* OSM GPIO_A_7/SPI_B_CS1# */ + pinctrl_gpio_a7: gpio1io11grp { + fsl,pins = ; /* OSM L17 */ + }; + + /* OSM PWM_0 as GPIO */ + pinctrl_pwm0_gpio: gpio2io12grp { + fsl,pins = ; /* OSM E18 */ + }; + + /* OSM GPIO_A_0 */ + pinctrl_gpio_a0: gpio5io0grp { + fsl,pins = ; /* OSM D17 */ + }; + + /* OSM GPIO_A_1 */ + pinctrl_gpio_a1: gpio5io1grp { + fsl,pins = ; /* OSM E17 */ + }; + + /* OSM GPIO_A_2 */ + pinctrl_gpio_a2: gpio5io2grp { + fsl,pins = ; /* OSM F17 */ + }; + + /* OSM GPIO_A_3 */ + pinctrl_gpio_a3: gpio5io3grp { + fsl,pins = ; /* OSM G17 */ + }; + + /* OSM GPIO_B_1 */ + pinctrl_gpio_b1: gpio5io8grp { + fsl,pins = ; /* OSM E19 */ + }; + + /* OSM GPIO_A_4 */ + pinctrl_gpio_a4: gpio5io9grp { + fsl,pins = ; /* OSM H17 */ + }; + + /* OSM GPIO_A_5 */ + pinctrl_gpio_a5: gpio5io10grp { + fsl,pins = ; /* OSM J17 */ + }; + + /* OSM GPIO_B_0 */ + pinctrl_gpio_b0: gpio5io11grp { + fsl,pins = ; /* OSM D19 */ + }; + + /* OSM GPIO_A_6/SPI_A_CS1# */ + pinctrl_gpio_a6: gpio5io13grp { + fsl,pins = ; /* OSM K17 */ + }; + + /* OSM SPI_A_CS0# */ + pinctrl_spi_a_cs0_gpio: gpio5io14grp { + fsl,pins = ; /* OSM Y15 */ + }; + + pinctrl_ctrl_gpio_exp_int: gpioexpintgrp { + fsl,pins = ; /* CTRL_GPIO_EXP_INT# */ + }; + + /* OSM I2C_A as GPIOs */ + pinctrl_i2c_a_gpio: lpi2c1gpiogrp { + fsl,pins = , /* OSM AA16 */ + ; /* OSM AA15 */ + }; + + /* OSM I2C_A */ + pinctrl_i2c_a: lpi2c1grp { + fsl,pins = , /* OSM AA16 */ + ; /* OSM AA15 */ + }; + + /* I2C_SOM (On-module I2C) as GPIOs */ + pinctrl_i2c_som_gpio: lpi2c3gpiogrp { + fsl,pins = , /* I2C_SOM_SDA */ + ; /* I2C_SOM_SCL */ + }; + + /* I2C_SOM (On-module I2C) */ + pinctrl_i2c_som: lpi2c3grp { + fsl,pins = , /* I2C_SOM_SDA */ + ; /* I2C_SOM_SCL */ + }; + + /* OSM I2C_B as GPIOs */ + pinctrl_i2c_b_gpio: lpi2c5gpiogrp { + fsl,pins = , /* OSM AA21 */ + ; /* OSM AA20 */ + }; + + /* OSM I2C_B */ + pinctrl_i2c_b: lpi2c5grp { + fsl,pins = , /* OSM AA21 */ + ; /* OSM AA20 */ + }; + + /* OSM SPI_B */ + pinctrl_spi_b: lpspi1grp { + fsl,pins = , /* OSM Y21 */ + , /* OSM Y23 */ + ; /* OSM Y22 */ + }; + + /* OSM SPI_A */ + pinctrl_spi_a: lpspi4grp { + fsl,pins = , /* OSM U16 */ + , /* OSM V15 */ + ; /* OSM U15 */ + }; + + /* OSM UART_CON */ + pinctrl_uart_con: lpuart1grp { + fsl,pins = , /* OSM D23 */ + ; /* OSM D22 */ + }; + + /* OSM UART_D */ + pinctrl_uart_d: lpuart2grp { + fsl,pins = , /* OSM C23 */ + ; /* OSM C22 */ + }; + + /* OSM UART_C */ + pinctrl_uart_c: lpuart3grp { + fsl,pins = , /* OSM B23 */ + ; /* OSM A22 */ + }; + + /* OSM UART_B */ + pinctrl_uart_b: lpuart5grp { + fsl,pins = , /* OSM D13 */ + , /* OSM D14 */ + , /* OSM D16 */ + ; /* OSM D15 */ + }; + + /* OSM UART_A */ + pinctrl_uart_a: lpuart6grp { + fsl,pins = , /* OSM B13 */ + , /* OSM A14 */ + , /* OSM C14 */ + ; /* OSM C13 */ + }; + + /* OSM PCIE_WAKE# */ + pinctrl_pcie_wake: pciewakegrp { + fsl,pins = ; /* OSM T2 */ + }; + + /* OSM I2S_A */ + pinctrl_i2s_a: sai3grp { + fsl,pins = , /* OSM W20 */ + , /* OSM V21 */ + , /* OSM W21 */ + ; /* OSM W18 */ + }; + + /* OSM I2S_MCLK */ + pinctrl_i2s_mclk: sai3mclkgrp { + fsl,pins = ; /* OSM V18 */ + }; + + /* OSM I2S_B */ + pinctrl_i2s_b: sai5grp { + fsl,pins = , /* OSM T19 */ + , /* OSM V19 */ + , /* OSM W19 */ + ; /* OSM T18 */ + }; + + /* OSM PWM_0 */ + pinctrl_pwm0: tpm3ch2grp { + fsl,pins = ; /* OSM E18 */ + }; + + /* OSM PWM_1 */ + pinctrl_pwm1: tpm4ch2grp { + fsl,pins = ; /* OSM F18 */ + }; + + /* OSM PWM_2 */ + pinctrl_pwm2: tpm5ch2grp { + fsl,pins = ; /* OSM G18 */ + }; + + /* OSM PWM_3 */ + pinctrl_pwm3: tpm6ch2grp { + fsl,pins = ; /* OSM H18 */ + }; + + /* On-module eMMC (max 200MHz) */ + pinctrl_emmc_200mhz: usdhc1-200mhzgrp { + fsl,pins = , /* eMMC_CLK */ + , /* eMMC_CMD */ + , /* eMMC_DATA0 */ + , /* eMMC_DATA1 */ + , /* eMMC_DATA2 */ + , /* eMMC_DATA3 */ + , /* eMMC_DATA4 */ + , /* eMMC_DATA5 */ + , /* eMMC_DATA6 */ + , /* eMMC_DATA7 */ + ; /* eMMC_STROBE */ + }; + + /* On-module eMMC (max 100MHz) */ + pinctrl_emmc: usdhc1grp { + fsl,pins = , /* eMMC_CLK */ + , /* eMMC_CMD */ + , /* eMMC_DATA0 */ + , /* eMMC_DATA1 */ + , /* eMMC_DATA2 */ + , /* eMMC_DATA3 */ + , /* eMMC_DATA4 */ + , /* eMMC_DATA5 */ + , /* eMMC_DATA6 */ + , /* eMMC_DATA7 */ + ; /* eMMC_STROBE */ + }; + + /* OSM SDIO_A (max 200MHz) */ + pinctrl_sdio_a_200mhz: usdhc2-200mhzgrp { + fsl,pins = , /* OSM F21 */ + , /* OSM E20 */ + , /* OSM G20 */ + , /* OSM G21 */ + , /* OSM H20 */ + ; /* OSM H21 */ + }; + + /* OSM SDIO_A_CD# */ + pinctrl_sdio_a_cd: usdhc2-cdgrp { + fsl,pins = ; /* OSM J21 */ + }; + + /* OSM SDIO_A_PWR_EN */ + pinctrl_sdio_a_pwr_en: usdhc2-pwrengrp { + fsl,pins = ; /* OSM D21 */ + }; + + /* OSM SDIO_A (sleep mode) */ + pinctrl_sdio_a_sleep: usdhc2-sleepgrp { + fsl,pins = , /* OSM F21 */ + , /* OSM E20 */ + , /* OSM G20 */ + , /* OSM G21 */ + , /* OSM H20 */ + ; /* OSM H21 */ + }; + + /* PMIC_SDIO_A_VSEL */ + pinctrl_sdio_a_vsel: usdhc2-vselgrp { + fsl,pins = ; /* PMIC_SDIO_A_VSEL */ + }; + + /* OSM SDIO_A (max 100MHz) */ + pinctrl_sdio_a: usdhc2grp { + fsl,pins = , /* OSM F21 */ + , /* OSM E20 */ + , /* OSM G20 */ + , /* OSM G21 */ + , /* OSM H20 */ + ; /* OSM H21 */ + }; + + /* OSM SDIO_B (max 200MHz) */ + pinctrl_sdio_b_200mhz: usdhc3-200mhzgrp { + fsl,pins = , /* OSM K20 */ + , /* OSM K21 */ + , /* OSM L20 */ + , /* OSM L21 */ + , /* OSM M21 */ + ; /* OSM N20 */ + }; + + /* OSM SDIO_B (max 100MHz) */ + pinctrl_sdio_b: usdhc3grp { + fsl,pins = , /* OSM K20 */ + , /* OSM K21 */ + , /* OSM L20 */ + , /* OSM L21 */ + , /* OSM M21 */ + ; /* OSM N20 */ + }; +}; -- 2.47.3