From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98C4E511E82; Thu, 17 Sep 2026 13:05:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789650367; cv=none; b=fovJPFI9lVTY3K5zAsqjt7H/gBkzpmwDhdVg07i43ryuGAOzmWUnWn3TT5mUgS8t+AEL3/ftPsVLRwqnMdIT/ZkEYmky7xw4faH6N/7GfmD5z2ApcSI4u1fDvEIV5zraIA7HK0+4g+WnoCg94TIO4hNO0xH5Ox95r8kZ4BdXZoQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789650367; c=relaxed/simple; bh=KDlAIIhnKS5fkAl4BuwIZmGCpqtsvUd9uHPkTZ/YAUg=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=bu1P51ZrOozRzm5F7ThV1L9jIupCrU1u6t/gxspyOQP88u7JSDgj5hPZ3CQuYvNOf3knjLuMAl0wXtFsu1OqbGdU+39fXUfy4AUbmi4jDtvLk43o0pMBpn9Uuwdh47l1Cfb0WWR3WdgFoW5+WxIuh/fsZOj2cfo6qBHepOtSavQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr; spf=none smtp.mailfrom=cjdns.fr; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b=dvdAoZxR; arc=none smtp.client-ip=5.135.140.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b="dvdAoZxR" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 211744BA1CE; Thu, 17 Sep 2026 15:05:41 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1789650350; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding; bh=sI54x/ez5T6fsA2elcHz3RaGZcESZ5CGlXIm7sI1To0=; b=dvdAoZxR7+zpdIT9didapD0CnUxXZbgsxzFNbc8GaOUiMocOHERVj+2HE+WHqLEaiBlq96 4k2dImmfjZV4lOGTQzFOeDC1F3A5eBPZCveyRIeEOS5CdrlcXFub3etJTRd0BxO9YyXgrM tEY3g62eK+rDHUk5XgQZT+gc/dhzVWHNhZS5jNUPgm7HhY2L0XogJ5u1ygLlTENnq/Cq2y A2yQDHvUp0gjTdiYbvCHvMQI2PtRovIkkrbYUMNmimHwYnbz5iMxEGEVUZ9i8NfjgnZIlE R26Wzw5LaWNZodaXthaZq3gpGHKbpUFm2A43e3TK7yTp+3drllO6+izKcEgTkA== From: Caleb James DeLisle To: netdev@vger.kernel.org Cc: daniel@makrotopia.org, dqfext@gmail.com, SkyLake.Huang@mediatek.com, andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Caleb James DeLisle , Matheus Sampaio Queiroga Subject: [PATCH v6 net-next] net: phy: mediatek: support MT7530 PHYs on EN71221 MCM Date: Thu, 17 Sep 2026 13:05:34 +0000 Message-Id: <20260917130534.297930-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 The EcoNet EN751221 multi-chip module implementation of the MT7530 requires some additional configuration of the PHYs on startup. The reason for this is not known, but it is possible that it has to do with the fact that the EN751221 MCM implementation of the MT7530 runs at an abnormal PLL frequency (362.5Mhz). Detect whether the MT7530 PHY is attached to the MDIO bus of an EcoNet EN751221 switch and if so, apply the necessary register updates. Additionally, never attempt to configure an MT7530 identified PHY which does not have gigabit support because the same ID is used for another (FE) PHY. Co-developed-by: Matheus Sampaio Queiroga Signed-off-by: Matheus Sampaio Queiroga Signed-off-by: Caleb James DeLisle --- drivers/net/phy/mediatek/mtk-ge.c | 81 ++++++++++++++++++++++++++++++- 1 file changed, 80 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/mediatek/mtk-ge.c b/drivers/net/phy/mediatek/mtk-ge.c index 96d8ac5154e5..62e3eff37b80 100644 --- a/drivers/net/phy/mediatek/mtk-ge.c +++ b/drivers/net/phy/mediatek/mtk-ge.c @@ -1,4 +1,5 @@ // SPDX-License-Identifier: GPL-2.0+ +#include #include #include #include @@ -101,6 +102,69 @@ static int mt7530_phy_config_init(struct phy_device *phydev) return 0; } +/* + * The EcoNet EN751221 "G" multi-chip module MT7530 requires additional PHY + * configuration. + */ +static int en751221_mcm_phy_config_init(struct phy_device *phydev) +{ + int ret; + + ret = genphy_soft_reset(phydev); + if (ret) + return ret; + + ret = phy_write_paged(phydev, MTK_PHY_PAGE_EXTENDED_1, + MTK_PHY_AUX_CTRL_AND_STATUS, 0x3a04); + if (ret < 0) + return ret; + + /* Clause 45 global/local data from mt7530GePhyCfgLoad(E3.0). */ + ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, 0x0417, 0x7775); + if (ret < 0) + return ret; + + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x00a6, 0x0350); + if (ret < 0) + return ret; + + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x0012, 0xd210); + if (ret < 0) + return ret; + + return mt7530_phy_config_init(phydev); +} + +static bool en751221_is_mcm_phy(struct phy_device *phydev) +{ + struct device *parent = phydev->mdio.bus->parent; + + return parent && parent->of_node && + of_device_is_compatible(parent->of_node, "econet,en751221"); +} + +/* + * MTK_GPHY_ID_MT7530 ID is also used for an EcoNet SoC FE phy, but that PHY + * does not advertise ESTATUS_1000_TFULL. + */ +static bool mt7530_is_gphy(struct phy_device *phydev) +{ + return phydev->phy_id == MTK_GPHY_ID_MT7530 && + (phy_read(phydev, MII_ESTATUS) & ESTATUS_1000_TFULL) != 0; +} + +static int mt7530_phy_match(struct phy_device *phydev, + const struct phy_driver *phydrv) +{ + return mt7530_is_gphy(phydev) && !en751221_is_mcm_phy(phydev); +} + +static int en751221_phy_match(struct phy_device *phydev, + const struct phy_driver *phydrv) +{ + return mt7530_is_gphy(phydev) && en751221_is_mcm_phy(phydev); +} + static int mt7531_phy_config_init(struct phy_device *phydev) { mtk_gephy_config_init(phydev); @@ -126,7 +190,6 @@ static int mt7531_phy_config_init(struct phy_device *phydev) static struct phy_driver mtk_gephy_driver[] = { { - PHY_ID_MATCH_EXACT(MTK_GPHY_ID_MT7530), .name = "MediaTek MT7530 PHY", .probe = mt7530_phy_probe, .config_init = mt7530_phy_config_init, @@ -135,6 +198,22 @@ static struct phy_driver mtk_gephy_driver[] = { */ .config_intr = genphy_no_config_intr, .handle_interrupt = genphy_handle_interrupt_no_ack, + .match_phy_device = mt7530_phy_match, + .suspend = genphy_suspend, + .resume = genphy_resume, + .read_page = mtk_phy_read_page, + .write_page = mtk_phy_write_page, + }, + { + .name = "EcoNet EN751221 MCM PHY", + .probe = mt7530_phy_probe, + .config_init = en751221_mcm_phy_config_init, + /* Interrupts are handled by the switch, not the PHY + * itself. + */ + .config_intr = genphy_no_config_intr, + .handle_interrupt = genphy_handle_interrupt_no_ack, + .match_phy_device = en751221_phy_match, .suspend = genphy_suspend, .resume = genphy_resume, .read_page = mtk_phy_read_page, -- 2.39.5