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Thu, 17 Sep 2026 19:22:38 +0000 (GMT) Received: from tuxmaker.lnxne.boe (unknown [9.87.85.9]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Thu, 17 Sep 2026 19:22:38 +0000 (GMT) From: Heiko Carstens To: Alexander Gordeev , Sven Schnelle , Vasily Gorbik , Christian Borntraeger , Mete Durlu , Peter Zijlstra , Mark Rutland , Juergen Christ , Ilya Leoshkevich Cc: linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: [PATCH 06/12] s390/percpu: Rename inline assembly symbolic names Date: Thu, 17 Sep 2026 21:22:31 +0200 Message-ID: <20260917192237.638324-7-hca@linux.ibm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260917192237.638324-1-hca@linux.ibm.com> References: <20260917192237.638324-1-hca@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: lCq8UJc3IrJJXkLYxL4uN7esy56C0Hiq X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE3MDI3MiBTYWx0ZWRfX1gm0t6taxM/u C2ROMKgH2wNYvt75JOboO1Kbrs3GSLTtKdT3xZC62bmdEXlCfVp7O5HBpovYJvmZwCS0885wDEF JKRn6GgMJ/xV6ZC+aymDYdDFDrFgC98= X-Authority-Analysis: v=2.4 cv=cvgOAF4i c=1 sm=1 tr=0 ts=6aac3e03 cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=4HBEOGDHSRqv0w81nQsA:9 X-Proofpoint-ORIG-GUID: lCq8UJc3IrJJXkLYxL4uN7esy56C0Hiq X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE3MDI3MiBTYWx0ZWRfX13sM+hitwvKJ rk8+f/d/MnCbP1a8TeDTDyumIHKhjBnWaPgcyu7avK6BxvDq/UbcZ+tgXuV2PL9Qwznj4M/i365 6h+4mKpnqV4M2dWdGdzJ+d/g6Z398tG7hobw3tGWVZFIlwAIBFp+nASwrCc0IA0Q/SxynMbrvaL YzMmmzpmzDduUYXDnLYsFi4TLMnHZ7Rw45L9zPq6oZgG+UZd+xpGT731Mod25SpQQGrffliF4i1 VEGr449DQFBG4kKOM/HLnNIxs8R4bGq6QhnuEIma9umuhRIAYhdVSPZ6mZfocMyH8rDDwRpUZxg dsiQxq7WEB4bOC5EVD38+uX9tTY4rRu8iFeCFWCoGS3MhXhFMSpWpmlTiK9zvsMUJO5e8iXp0nk wMpXuYo8iBAVo5q4mkuqrG5G7+zIWhB0GuD+MNq7U124I1NLWXOv3EdmnlMRinBks3JG2C6LJRb WCtdQbtNmy+9SPNCkWQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-17_04,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 bulkscore=0 impostorscore=0 phishscore=0 spamscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609170272 Rename perpcu inline assembly symbolic names so they match (more) what is specified with input operands. A trivial change which is supposed to make the code a bit more readable. Signed-off-by: Heiko Carstens --- arch/s390/include/asm/percpu.h | 60 +++++++++++++++++----------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/s390/include/asm/percpu.h b/arch/s390/include/asm/percpu.h index 770fe4be65dc..0df47ec2e6c7 100644 --- a/arch/s390/include/asm/percpu.h +++ b/arch/s390/include/asm/percpu.h @@ -151,29 +151,29 @@ do { \ if (__builtin_constant_p(val__) && \ ((szcast)val__ > -129) && ((szcast)val__ < 128)) { \ asm volatile( \ - MVIY_PERCPU("%[disppcpr]","%[ptr__]") \ - AG_ALT("%[disppcpo]", "%[ptr__]") \ + MVIY_PERCPU("%[lcreg]","%[ptr__]") \ + AG_ALT("%[lcoff]", "%[ptr__]") \ op2 " 0(%[ptr__]),%[val__]\n" \ - MVIY_ALT("%[disppcpr]") \ + MVIY_ALT("%[lcreg]") \ : [ptr__] "+&a" (ptr__), "+m" (*ptr__), \ "=m" (((struct lowcore *)0)->percpu_register) \ : [val__] "i" ((szcast)val__), \ - [disppcpr] "i" (LC_PERCPU_REGISTER), \ - [disppcpo] "i" (LC_PERCPU_OFFSET), \ + [lcreg] "i" (LC_PERCPU_REGISTER), \ + [lcoff] "i" (LC_PERCPU_OFFSET), \ "m" (((struct lowcore *)0)->percpu_offset) \ : "cc"); \ } else { \ asm volatile( \ - MVIY_PERCPU("%[disppcpr]", "%[ptr__]") \ - AG_ALT("%[disppcpo]", "%[ptr__]") \ + MVIY_PERCPU("%[lcreg]", "%[ptr__]") \ + AG_ALT("%[lcoff]", "%[ptr__]") \ op1 " %[old__],%[val__],0(%[ptr__])\n" \ - MVIY_ALT("%[disppcpr]") \ + MVIY_ALT("%[lcreg]") \ : [old__] "=&d" (old__), \ [ptr__] "+&a" (ptr__), "+m" (*ptr__), \ "=m" (((struct lowcore *)0)->percpu_register) \ : [val__] "d" (val__), \ - [disppcpr] "i" (LC_PERCPU_REGISTER), \ - [disppcpo] "i" (LC_PERCPU_OFFSET), \ + [lcreg] "i" (LC_PERCPU_REGISTER), \ + [lcoff] "i" (LC_PERCPU_OFFSET), \ "m" (((struct lowcore *)0)->percpu_offset) \ : "cc"); \ } \ @@ -190,16 +190,16 @@ do { \ \ ptr__ = PERCPU_PTR(&(pcp)); \ asm_inline volatile( \ - MVIY_PERCPU("%[disppcpr]","%[ptr__]") \ - AG_ALT("%[disppcpo]","%[ptr__]") \ + MVIY_PERCPU("%[lcreg]","%[ptr__]") \ + AG_ALT("%[lcoff]","%[ptr__]") \ op " %[old__],%[val__],0(%[ptr__])\n" \ - MVIY_ALT("%[disppcpr]") \ + MVIY_ALT("%[lcreg]") \ : [old__] "=&d" (old__), \ [ptr__] "+&a" (ptr__), "+m" (*ptr__), \ "=m" (((struct lowcore *)0)->percpu_register) \ : [val__] "d" (val__), \ - [disppcpr] "i" (LC_PERCPU_REGISTER), \ - [disppcpo] "i" (LC_PERCPU_OFFSET), \ + [lcreg] "i" (LC_PERCPU_REGISTER), \ + [lcoff] "i" (LC_PERCPU_OFFSET), \ "m" (((struct lowcore *)0)->percpu_offset) \ : "cc"); \ old__ + val__; \ @@ -216,16 +216,16 @@ do { \ \ ptr__ = PERCPU_PTR(&(pcp)); \ asm_inline volatile( \ - MVIY_PERCPU("%[disppcpr]","%[ptr__]") \ - AG_ALT("%[disppcpo]","%[ptr__]") \ + MVIY_PERCPU("%[lcreg]","%[ptr__]") \ + AG_ALT("%[lcoff]","%[ptr__]") \ op " %[old__],%[val__],0(%[ptr__])\n" \ - MVIY_ALT("%[disppcpr]") \ + MVIY_ALT("%[lcreg]") \ : [old__] "=&d" (old__), \ [ptr__] "+&a" (ptr__), "+m" (*ptr__), \ "=m" (((struct lowcore *)0)->percpu_register) \ : [val__] "d" (val__), \ - [disppcpr] "i" (LC_PERCPU_REGISTER), \ - [disppcpo] "i" (LC_PERCPU_OFFSET), \ + [lcreg] "i" (LC_PERCPU_REGISTER), \ + [lcoff] "i" (LC_PERCPU_OFFSET), \ "m" (((struct lowcore *)0)->percpu_offset) \ : "cc"); \ } while (0) @@ -245,14 +245,14 @@ do { \ \ ptr__ = PERCPU_PTR(&(pcp)); \ asm_inline volatile( \ - MVIY_PERCPU("%[disppcpr]","%[ptr__]") \ - AG_ALT("%[disppcpo]","%[ptr__]") \ + MVIY_PERCPU("%[lcreg]","%[ptr__]") \ + AG_ALT("%[lcoff]","%[ptr__]") \ op " %[res__],0(%[ptr__])\n" \ - MVIY_ALT("%[disppcpr]") \ + MVIY_ALT("%[lcreg]") \ : [res__] "=&d" (res__), [ptr__] "+&a" (ptr__), \ "=m" (((struct lowcore *)0)->percpu_register) \ - : [disppcpr] "i" (LC_PERCPU_REGISTER), \ - [disppcpo] "i" (LC_PERCPU_OFFSET), \ + : [lcreg] "i" (LC_PERCPU_REGISTER), \ + [lcoff] "i" (LC_PERCPU_OFFSET), \ "m" (*ptr__), \ "m" (((struct lowcore *)0)->percpu_offset) \ : "cc"); \ @@ -271,15 +271,15 @@ do { \ \ ptr__ = PERCPU_PTR(&(pcp)); \ asm_inline volatile( \ - MVIY_PERCPU("%[disppcpr]","%[ptr__]") \ - AG_ALT("%[disppcpo]","%[ptr__]") \ + MVIY_PERCPU("%[lcreg]","%[ptr__]") \ + AG_ALT("%[lcoff]","%[ptr__]") \ op " %[val__],0(%[ptr__])\n" \ - MVIY_ALT("%[disppcpr]") \ + MVIY_ALT("%[lcreg]") \ : [ptr__] "+&a" (ptr__), "=m" (*ptr__), \ "=m" (((struct lowcore *)0)->percpu_register) \ : [val__] "d" (val__), \ - [disppcpr] "i" (LC_PERCPU_REGISTER), \ - [disppcpo] "i" (LC_PERCPU_OFFSET), \ + [lcreg] "i" (LC_PERCPU_REGISTER), \ + [lcoff] "i" (LC_PERCPU_OFFSET), \ "m" (((struct lowcore *)0)->percpu_offset) \ : "cc"); \ } while (0) -- 2.53.0