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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?toGCrZ8qwn3nbmBQ5jhkOg0xPuDnTB6FRFj2giBdL0zkjS9h10g145qGGMS+?= =?us-ascii?Q?XPwtV40LcrZAfn03WuvYyMpxgq1hI8b7i9i+85Nvu46wbQ8/wJI/jIGg6OgV?= =?us-ascii?Q?Q2rnA7RR9YvIbHx+wr2NXxnjz8YmNM0e17SvuH1Gu94MNSG0IwyFNk1Dy9GU?= =?us-ascii?Q?YxDnbfEpdM9SJp7hd3Rk/U9paFdfVceo/6o0UklPwSWdITDUCWQtul5EPqug?= =?us-ascii?Q?6f42IKsCyEFbG3A57e+XNdLuYhio3nlEaq4Izdg0IWR9DJZZWYy4A6+Hap4O?= =?us-ascii?Q?mjehKiKIxQOdCV5rn0JAYsvsAzSKje3rDLiUjGxe8+MsxMoLXixeQoboDDlx?= =?us-ascii?Q?pfn0IX8UmxackI8dg2HPUoBrw7CGoo4HCIvG/oqiExvziPkl/bjSxOqUs0NW?= =?us-ascii?Q?A6rxbCJ23f+2i3GKl69T5+9I/jRwGs8wjX+coatQ/o+Cy4fYs4gUcnw+TVWf?= =?us-ascii?Q?jMLqSFH/vLaTBB7vyk1GRk1f6ugjF5jTGJOd+QHsMvBx8+CXYr/j3azKs4GO?= =?us-ascii?Q?9oUak2S0eYpwwqfh/d53ZNkQXPC/CFYA3CrIzFIfBRLYg4mYN5knGyg9mxgH?= =?us-ascii?Q?yFub8yxiuG98WzMbmMqmWl/3+GSBQzZ4MahbhfBORNIdF9NIlJ8yZmxGAwAF?= =?us-ascii?Q?dKQDlK+AxQUrKgv3gNOryZSEJKk/wNT6vSTXAK8ukdn/Y1iy1+PTEAsFRuC/?= =?us-ascii?Q?W4PE4Kxvg0m0YXzvIo9vVWy2Ra9zMHn7PK0SmEeYq3W0QbqdZsmno2sjC1pP?= =?us-ascii?Q?46suYyLlvzdN50Nkxm1LzS47D9YC09TB3xgjjl47szOCi8/02X+/VnVj4mEl?= =?us-ascii?Q?QtzVI5t9ZpwXLb5qRspOsTWUQ6ya/7JmmiUalUZConjCX22SBTWI+sd8Nh1N?= =?us-ascii?Q?vST4K41gfJHEPWhut5ErPsU6yQrE/KaNfOU8wUVcA2HGoa9vyDH0jPiVywoN?= =?us-ascii?Q?xEXPx4t9TjqFxU2SpyZA95WmZNDMJD/FrPO/ZvagYtZJjCuG+lGLuEbYDjxO?= =?us-ascii?Q?dB3NBzC2qTfQPGol2MXqNhw6VXdNuQ61qNFUNn6hRIDwoJmhWGwkSyptR3zA?= =?us-ascii?Q?MoYDnb34h9crlvJRlelanLyqmu62yHjhmss8+jPpftBVgszBrFtt9pKPh31r?= =?us-ascii?Q?NZMJyzRkjZ3OXQsmnIDcsKUTweLpE1nqADADZ3ba9f/y4KpZHVc3SiOMbzes?= =?us-ascii?Q?/BUE9yLVjVlwmXnUTy20wHK90PqJXo7Ypg200NrLXzR57wX+fp8hwMlPqBob?= =?us-ascii?Q?qp+Gc7AY4Z6lh3sncUCua1gVeMVpYV57mRZ7l/QtvZzRxpIFt0zgFMrSaEuy?= =?us-ascii?Q?5efg8SVKG2u5hSAG8tALTLcUf15sHZIwCCqbPDKdrjm+6jX0FPFZu3/3LR77?= =?us-ascii?Q?Woqn5ESRmWyig7LTxZ0yIrXNRoVUvYMqwOFcVOD1SkqPfS1AEDFnT/i2jW9p?= =?us-ascii?Q?Rr9X/gtYH4WYLqz8qkwiSLARHlh+QQc3k1/5ZJ3M2zIrshzQmEiSXRknT/2k?= =?us-ascii?Q?S3cHG/3BdwUq24RIXgmjG0E8YVu4u9iIPYnupq+R+vQxPItOzWldN39PA2gr?= =?us-ascii?Q?P+vvMtAJoYU3xNVFa8B7q8usdI4fW+kWILbWZtWGiktyM2vBpatPRznn4Wxg?= =?us-ascii?Q?nqbR7Br9du086bXKzjKOf963ZK69TjPBU8XaW8yivQLrNJ/JKJ+7+LE5WpNq?= =?us-ascii?Q?cOnkM+OaUNyEwlvobRdLt0CtTa9i8IOVuFPrxs6ZI8T++aCr1pSW8cY2efV+?= =?us-ascii?Q?2DwEBlVb4g=3D=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: dad7cc7a-f9d5-4225-a4b5-08df15213f25 X-MS-Exchange-CrossTenant-AuthSource: DM3PR12MB9416.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2026 01:07:44.9152 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: HpEsDX6BAFXpR+x+kfvGqwymLMFOWchl6W643oFk69PNMFO5X4Sjtd3NDhgalHGW+3W0S7kV9MTllBL6Exyp0Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5888 The generic falcon bootloader reads its load parameters from a descriptor that the driver places in DMEM. The r000 load-and-execute bootloader event carries such a descriptor, so its handler in the following patch needs the descriptor type. The descriptor was defined in the FWSEC code, which was its only user. Move the definition, unchanged, into the generic bootloader module. Its fields become pub(crate) so that the FWSEC code can still fill them in. No functional changes. Assisted-by: LLM Signed-off-by: John Hubbard --- .../nova-core/firmware/fwsec/bootloader.rs | 52 ++----------------- .../gpu/nova-core/firmware/gen_bootloader.rs | 48 +++++++++++++++++ 2 files changed, 52 insertions(+), 48 deletions(-) diff --git a/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs b/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs index 1584a4b814d2..96ad223df16f 100644 --- a/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs +++ b/drivers/gpu/nova-core/firmware/fwsec/bootloader.rs @@ -35,60 +35,16 @@ }, firmware::{ fwsec::FwsecFirmware, - gen_bootloader::GenericBootloader, // + gen_bootloader::{ + BootloaderDmemDescV2, + GenericBootloader, // + }, }, gpu::Chipset, num::FromSafeCast, // regs, }; -/// Structure used by the boot-loader to load the rest of the code. -/// -/// This has to be filled by the GPU driver and copied into DMEM at offset -/// [`BootloaderDesc.dmem_load_off`]. -#[repr(C, packed)] -#[derive(Debug, Clone)] -struct BootloaderDmemDescV2 { - /// Reserved, should always be first element. - reserved: [u32; 4], - /// 16B signature for secure code, 0s if no secure code. - signature: [u32; 4], - /// DMA context used by the bootloader while loading code/data. - ctx_dma: u32, - /// 256B-aligned physical FB address where code is located. - code_dma_base: u64, - /// Offset from `code_dma_base` where the non-secure code is located. - /// - /// Also used as destination IMEM offset of non-secure code as the DMA firmware object is - /// expected to be a mirror image of its loaded state. - /// - /// Must be multiple of 256. - non_sec_code_off: u32, - /// Size of the non-secure code part. - non_sec_code_size: u32, - /// Offset from `code_dma_base` where the secure code is located (must be multiple of 256). - /// - /// Also used as destination IMEM offset of secure code as the DMA firmware object is expected - /// to be a mirror image of its loaded state. - /// - /// Must be multiple of 256. - sec_code_off: u32, - /// Size of the secure code part. - sec_code_size: u32, - /// Code entry point invoked by the bootloader after code is loaded. - code_entry_point: u32, - /// 256B-aligned physical FB address where data is located. - data_dma_base: u64, - /// Size of data block (should be multiple of 256B). - data_size: u32, - /// Number of arguments to be passed to the target firmware being loaded. - argc: u32, - /// Arguments to be passed to the target firmware being loaded. - argv: u32, -} -// SAFETY: This struct doesn't contain uninitialized bytes and doesn't have interior mutability. -unsafe impl AsBytes for BootloaderDmemDescV2 {} - /// Wrapper for [`FwsecFirmware`] that includes the bootloader performing the actual load /// operation. pub(crate) struct FwsecFirmwareWithBl<'a> { diff --git a/drivers/gpu/nova-core/firmware/gen_bootloader.rs b/drivers/gpu/nova-core/firmware/gen_bootloader.rs index 65af57a34940..943a5bc16e93 100644 --- a/drivers/gpu/nova-core/firmware/gen_bootloader.rs +++ b/drivers/gpu/nova-core/firmware/gen_bootloader.rs @@ -12,6 +12,7 @@ Alignable, Alignment, // }, + transmute::AsBytes, // }; use crate::{ @@ -27,6 +28,53 @@ num::FromSafeCast, // }; +/// Structure used by the boot-loader to load the rest of the code. +/// +/// This has to be filled by the GPU driver and copied into DMEM at offset +/// [`BootloaderDesc.dmem_load_off`]. +#[repr(C, packed)] +#[derive(Debug, Clone)] +pub(crate) struct BootloaderDmemDescV2 { + /// Reserved, should always be first element. + pub(crate) reserved: [u32; 4], + /// 16B signature for secure code, 0s if no secure code. + pub(crate) signature: [u32; 4], + /// DMA context used by the bootloader while loading code/data. + pub(crate) ctx_dma: u32, + /// 256B-aligned physical FB address where code is located. + pub(crate) code_dma_base: u64, + /// Offset from `code_dma_base` where the non-secure code is located. + /// + /// Also used as destination IMEM offset of non-secure code as the DMA firmware object is + /// expected to be a mirror image of its loaded state. + /// + /// Must be multiple of 256. + pub(crate) non_sec_code_off: u32, + /// Size of the non-secure code part. + pub(crate) non_sec_code_size: u32, + /// Offset from `code_dma_base` where the secure code is located (must be multiple of 256). + /// + /// Also used as destination IMEM offset of secure code as the DMA firmware object is expected + /// to be a mirror image of its loaded state. + /// + /// Must be multiple of 256. + pub(crate) sec_code_off: u32, + /// Size of the secure code part. + pub(crate) sec_code_size: u32, + /// Code entry point invoked by the bootloader after code is loaded. + pub(crate) code_entry_point: u32, + /// 256B-aligned physical FB address where data is located. + pub(crate) data_dma_base: u64, + /// Size of data block (should be multiple of 256B). + pub(crate) data_size: u32, + /// Number of arguments to be passed to the target firmware being loaded. + pub(crate) argc: u32, + /// Arguments to be passed to the target firmware being loaded. + pub(crate) argv: u32, +} +// SAFETY: This struct doesn't contain uninitialized bytes and doesn't have interior mutability. +unsafe impl AsBytes for BootloaderDmemDescV2 {} + /// The generic falcon bootloader image and its IMEM load parameters. pub(crate) struct GenericBootloader { /// Bootloader code, zero-padded to a whole number of falcon memory blocks. -- 2.55.0