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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?2td4OeV7GRLsRDV8HQ58mmGCpcNOxqM3+/Yunprw7X1LyHZ5I31wp00i9/dW?= =?us-ascii?Q?DknN4joYRaPr4HRU8gJENKzos598m1yM5OMx0jG/Q0tPEHeXRThEyM543F6s?= =?us-ascii?Q?0fcKD/cUc6p6w7IXOsnrIZfCFMRfwCaoQTVD7MJcB+gmfb0zOnvXAZ3CZZgW?= =?us-ascii?Q?AMs51ijtKqTcf6wwyomTiRsTYnAh83bCjwDmSn36Z/MpZzgsWShtY63Cyp0g?= =?us-ascii?Q?6exZ/XofiEV2J/JsVTXsr93TbhHGYSK9fIukT2vbSdEUShjGYHimxJR2ow5v?= =?us-ascii?Q?ixfmvCziIhoeNpPpHZvZkB0HubrmBVmSy8MjBGkOoog8DHn9nY4LDLmPMRJ+?= =?us-ascii?Q?ACYWVKUaIX724WNvNCi8Y7TeYjNEmRhH4eR/+caWWV6O4/Xw/VgZfh7wb+I+?= =?us-ascii?Q?ahZZ0FK1j2UOra77OhLGDw62R0++olI3DQQKHgSMwxXMv1iKjrd9goOPZEdT?= =?us-ascii?Q?1kscwxL22C+MxklyZyZ3Ki5nYWfjPgdQ4lvVcEw4jJu56gI1uSQ0VjAGv3d9?= =?us-ascii?Q?o9ipsO5we7M25ytDu3qc08y7t/5m+qY+PpHFVQCN1kc7JRR8aYuRaGMWKrNg?= =?us-ascii?Q?hByoAgJjk/Y0vFvjhhQ/wlBotzzEQHXRCmjTv7WOxEAuwbVDS00BnZgTZ8In?= =?us-ascii?Q?1Cb1JiHGi+zhiUEZBZE/+rk4us8Ca+vW0lqOKihmvx3b0BHnEtgmbV4E4sbD?= =?us-ascii?Q?3YWMTmvwdwog6E1AJBAeOotAetVKutkfhRiaa6Pb4ci6U0y3hi6JzypflIbZ?= =?us-ascii?Q?2ZHCdQSKhQRffkQjgf70szsbI/s3OP4hyDaDAxkPGZypVBbFmyeEWc3kchE7?= =?us-ascii?Q?QGZFCam7g02MgMUWI5YOxzsLZ/TKtAt1pJoRG3xAOD7zs9MW78UL89SKlVPE?= =?us-ascii?Q?ulMgJIqj+kQOZtBLem443Mx3j2hDZXhGU9GNZ0R4iZpjk4TfC1doi6F+w77j?= =?us-ascii?Q?Vrpy8hG1APYZR0eiawnhVqOiHxlPArUSxgJ0WXISt7GTUKYEsOX+22MY/xbl?= =?us-ascii?Q?w4q33F3dv7AQBpFKJIjyfEAok6yGGaODEBjHgETfroGZ7rH1+rfY9yw/qZ6e?= =?us-ascii?Q?dmRICRfG4hf78rsPeRChAtQ8x85bFNnweZv6Tdz8iXWath7ODwObfEFlKSt3?= =?us-ascii?Q?mfT0beNPmcqFQ8pXxU9D+iFRuvv4OYS5eQUa86PgYQWZcy7XguvGCefMcTRT?= =?us-ascii?Q?T7yuk1ku/k/12FEGNqTb+7wSNETV+toJr9sf6T/BgenItbTIcndn43Ti6lO1?= =?us-ascii?Q?LVwv9A0fHG0FtBa24Q7dVhz48gMRLsG4I8TZ2bv7oXv25k2rbrGeLarSJx6S?= =?us-ascii?Q?c2/fbQfYd3vGyrOeD2h+dn5puiznu2vsHEfnc18XT9h6idzqAVrQj68T1CXh?= =?us-ascii?Q?ZJ54OOFjGPjpG4nyMMk1FzVLFAq+FPAqeVCV8p8zsAfNsKKB7KUwxsMfHh2a?= =?us-ascii?Q?uW2G1CKpTOdvRycm0jDkrNvuBg8NSzZJAvoFxpUDTOv/2RRkdbG8J+e4BnRt?= =?us-ascii?Q?BEhp0ElA/9+k5it4afyQnBZ8LgXXfGDyaE5hh6gBcx52gPyWvQS2HuJ0ahw7?= =?us-ascii?Q?mwmNLKNb7Sl7K0jZ5OQh41XmxMxBD6PgqJyz7yzU6gUdCItX0Dc3jGdUMrBk?= =?us-ascii?Q?udfvSmS366kLPaT74bmY+TIhqUVuSSkbAGxEU2rnAfEU94qz2fAILd2/qzoO?= =?us-ascii?Q?jTNMtl5mcw1hAQy51VCGjn2VkfKut/lqSMNz961tGwaq1jWtG3lssHnpD9/+?= =?us-ascii?Q?fRcaEIVzSQ=3D=3D?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 18cd9f79-12f9-4d4d-24d4-08df152140cf X-MS-Exchange-CrossTenant-AuthSource: DM3PR12MB9416.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2026 01:07:47.6962 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: IvQrEq5u+kcxNm4yKE3erbK/UsE8OOa3h6GYu83ln6shxbcNNZFaPNI07BuvwIx5zc2mudZpyLTkDRy+Jeyk8Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5888 The two load-and-execute events of the r000 boot protocol arrive as GMC events, each named by a command id. Nova-core had a handler for each event, but no dispatcher that read the id and picked the handler, and each handler ended with its own copy of the core resume. Add the dispatcher, and move the core resume out of the two handlers into it. Each handler now ends with the falcon halted, and the dispatcher runs the core resume once after whichever handler ran. The dispatcher has no caller yet. Assisted-by: LLM Reviewed-by: Timur Tabi Reviewed-by: Zhi Wang Signed-off-by: John Hubbard --- drivers/gpu/nova-core/gsp/boot.rs | 69 +++++++++++++++++++++++-------- drivers/gpu/nova-core/gsp/fw.rs | 10 +++++ 2 files changed, 62 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/boot.rs index ee366d782218..c805b42dd7bc 100644 --- a/drivers/gpu/nova-core/gsp/boot.rs +++ b/drivers/gpu/nova-core/gsp/boot.rs @@ -39,7 +39,11 @@ }, gsp::{ cmdq::Cmdq, - commands, // + commands, + fw::{ + GMCAPI_CMD_EXEC_GENERIC_BOOTLOADER, + GMCAPI_CMD_EXEC_HS_BINARY, // + }, // }, regs, sbuffer::SBufferIter, // @@ -141,10 +145,51 @@ fn core_resume(&self) -> Result { Ok(()) } + /// Runs the load-and-execute handler that `command_id` names on the event payload, which the + /// ring may have split in two, and then runs the core resume. + /// + /// # Errors + /// + /// - `EINVAL` if `command_id` is not a load-and-execute command. + /// + /// Errors from the handlers and from [`Self::core_resume`] are propagated as-is. + #[expect(dead_code)] + fn dispatch_gmc_boot_event( + &self, + command_id: u32, + payload_0: &[u8], + payload_1: &[u8], + ) -> Result { + let handled = match command_id { + GMCAPI_CMD_EXEC_GENERIC_BOOTLOADER => { + self.handle_load_exec_bootloader(payload_0, payload_1) + } + GMCAPI_CMD_EXEC_HS_BINARY => self.handle_load_exec_hs_binary(payload_0, payload_1), + _ => { + dev_err!( + self.dev, + "Unexpected GMC boot event: command_id={:#010x}\n", + command_id + ); + return Err(EINVAL); + } + }; + + handled.and_then(|()| self.core_resume()).inspect_err(|e| { + dev_err!( + self.dev, + "GMC boot event {:#010x} failed: {:?}\n", + command_id, + e + ); + }) + } + /// Runs the generic bootloader on the GSP falcon, as a `GMCAPI_CMD_EXEC_GENERIC_BOOTLOADER` - /// event requests, and then restarts GSP-RM. + /// event requests. /// - /// The descriptor that the event carries names the image that the bootloader loads. + /// The descriptor that the event carries names the image that the bootloader loads. The GSP + /// falcon is left halted. /// /// # Errors /// @@ -153,9 +198,6 @@ fn core_resume(&self) -> Result { /// it, or if the event names a context DMA slot or an aperture that does not exist. /// - `ETIMEDOUT` if the RISC-V core does not suspend within two seconds, or the GSP falcon does /// not halt within two seconds of starting the image. - /// - /// Errors from [`Self::core_resume`] are propagated as-is. - #[expect(dead_code)] fn handle_load_exec_bootloader(&self, payload_0: &[u8], payload_1: &[u8]) -> Result { let Self { gsp_falcon, dev, .. @@ -205,16 +247,14 @@ fn handle_load_exec_bootloader(&self, payload_0: &[u8], payload_1: &[u8]) -> Res Ok(()) }, - )?; - - self.core_resume() + ) } /// Runs a Heavy-Secured (HS) binary on the GSP falcon, as a `GMCAPI_CMD_EXEC_HS_BINARY` event - /// requests, and then restarts GSP-RM. + /// requests. /// /// GSP-RM has placed the binary in the framebuffer, and the falcon's boot ROM (BROM) verifies - /// the binary's signature before the binary runs. + /// the binary's signature before the binary runs. The GSP falcon is left halted. /// /// # Errors /// @@ -222,9 +262,6 @@ fn handle_load_exec_bootloader(&self, payload_0: &[u8], payload_1: &[u8]) -> Res /// fit the BROM register field. /// - `ETIMEDOUT` if the RISC-V core does not suspend within two seconds, or the GSP falcon does /// not halt within two seconds of starting the binary. - /// - /// Errors from [`Self::core_resume`] are propagated as-is. - #[expect(dead_code)] fn handle_load_exec_hs_binary(&self, payload_0: &[u8], payload_1: &[u8]) -> Result { let Self { gsp_falcon, dev, .. @@ -297,9 +334,7 @@ fn handle_load_exec_hs_binary(&self, payload_0: &[u8], payload_1: &[u8]) -> Resu Ok(()) }, - )?; - - self.core_resume() + ) } } diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs index f23d071f0e16..e86283f67358 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -1055,6 +1055,16 @@ pub(crate) struct GmcApiHeader { /// Bits of [`GmcApiHeader::command`] that hold the command id. The high byte holds flags. const GMCAPI_COMMAND_ID_MASK: u32 = 0x00ff_ffff; +/// GMC event that requests the driver to run the generic falcon bootloader on the descriptor that +/// the event carries. +pub(crate) const GMCAPI_CMD_EXEC_GENERIC_BOOTLOADER: u32 = + r000_00::GMCAPI_COMMANDS_GMCAPI_CMD_EXEC_GENERIC_BOOTLOADER; + +/// GMC event that requests the driver to run a Heavy-Secured (HS) binary that GSP-RM has placed in +/// the framebuffer. +pub(crate) const GMCAPI_CMD_EXEC_HS_BINARY: u32 = + r000_00::GMCAPI_COMMANDS_GMCAPI_CMD_EXEC_HS_BINARY; + static_assert!(size_of::() == size_of::()); static_assert!( core::mem::offset_of!(GmcApiHeader, command) -- 2.55.0