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Fri, 18 Sep 2026 09:52:37 -0700 (PDT) From: Alex Elder To: sboyd@kernel.org, bmasney+clk@redhat.com, jbrunet+clk@baylibre.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lee@kernel.org, andersson@kernel.org, konradybcio@kernel.org, abelvesa@kernel.org, kees@kernel.org, gustavoars@kernel.org, p.zabel@pengutronix.de Cc: daniel@riscstar.com, mohd.anwar@oss.qualcomm.com, lorenzo.bianconi@oss.qualcomm.com, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, mfd@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-hardening@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/4] clk: introduce TC9564 clock and reset Date: Fri, 18 Sep 2026 11:52:29 -0500 Message-ID: <20260918165234.687224-1-elder@riscstar.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This series adds support for the clock and reset controller present within the TC9564 SoC. This SoC attaches to a host system via PCIe. It includes a PCIe switch with three downstream ports. To one of these ports an embedded PCIe endpoint is attached, and it implements two PCI functions. BAR 4 for both of these PCI functions provides access to the registers that enable or disable a number of clock signals, and assert or deassert a set of reset lines. The TC9564 PCI functions provide PCI endpoint buses via devicetree. This allows a PCI function to use devicetree to define subordinate devices accessible using one or more of the function's BARs. The clock/reset driver binds with a device defined this way. Only one of the two PCI functions is permitted to define the clock/reset device node. -Alex Note: to work correctly, this series depends on this: https://lore.kernel.org/lkml/20260918152659.413268-1-elder@riscstar.com/ Alex Elder (4): dt-bindings: mfd: introduce the TC9564 config syscon dt-bindings: clock: introduce toshiba,tc9564-clock.yaml clk: toshiba: introduce a TC9564 SoC clock and reset driver arm64: dts: qcom: qcs6490-rb3gen2: add the clock controller .../bindings/clock/toshiba,tc9564-clock.yaml | 64 +++ .../bindings/mfd/toshiba,tc9564.yaml | 56 +++ MAINTAINERS | 9 + arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 22 +- drivers/clk/Kconfig | 11 + drivers/clk/Makefile | 1 + drivers/clk/clk-tc9564.c | 366 ++++++++++++++++++ include/dt-bindings/clock/toshiba,tc9564.h | 54 +++ 8 files changed, 582 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml create mode 100644 Documentation/devicetree/bindings/mfd/toshiba,tc9564.yaml create mode 100644 drivers/clk/clk-tc9564.c create mode 100644 include/dt-bindings/clock/toshiba,tc9564.h base-commit: 79d34e34e9ab629be19e588ec2eb7e1855d6dc46 -- 2.53.0