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From: Qingfang Deng <qingfang.deng@linux.dev>
To: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Vikram Sethi <vsethi@nvidia.com>,
	"Mike Rapoport (Microsoft)" <rppt@kernel.org>,
	Shanker Donthineni <sdonthineni@nvidia.com>,
	Qingfang Deng <qingfang.deng@linux.dev>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: linux-arch@vger.kernel.org
Subject: [PATCH v2 3/3] arm64: use generic MMIO accessors
Date: Sun, 20 Sep 2026 09:43:51 +0800	[thread overview]
Message-ID: <20260920014357.7069-3-qingfang.deng@linux.dev> (raw)
In-Reply-To: <20260920014357.7069-1-qingfang.deng@linux.dev>

Use the generic raw write accessors in place of the inline assembly
stores. Include asm-generic/mmio.h after the arm64 ordering hooks so
these accessors are also available to the write-combining helpers
before asm-generic/io.h is included.

Retain the raw read overrides when either the Cortex-A57 erratum 832075
or NVIDIA Olympus erratum 1027 workaround is configured. This preserves
the alternative-patched load-acquire instructions and pre-load barriers.
Use generic raw reads when neither workaround is enabled.

Assisted-by: Codex:gpt-6-astra
Signed-off-by: Qingfang Deng <qingfang.deng@linux.dev>
---
v2: new patch
---
 arch/arm64/include/asm/io.h | 37 ++++++-------------------------------
 1 file changed, 6 insertions(+), 31 deletions(-)

diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h
index 49a7002661a9..2fdac25bc31b 100644
--- a/arch/arm64/include/asm/io.h
+++ b/arch/arm64/include/asm/io.h
@@ -19,37 +19,9 @@
 #include <asm/cpufeature.h>
 #include <asm/rsi.h>
 
-/*
- * Generic IO read/write.  These perform native-endian accesses.
- */
-#define __raw_writeb __raw_writeb
-static __always_inline void __raw_writeb(u8 val, volatile void __iomem *addr)
-{
-	volatile u8 __iomem *ptr = addr;
-	asm volatile("strb %w0, %1" : : "rZ" (val), "Qo" (*ptr));
-}
-
-#define __raw_writew __raw_writew
-static __always_inline void __raw_writew(u16 val, volatile void __iomem *addr)
-{
-	volatile u16 __iomem *ptr = addr;
-	asm volatile("strh %w0, %1" : : "rZ" (val), "Qo" (*ptr));
-}
-
-#define __raw_writel __raw_writel
-static __always_inline void __raw_writel(u32 val, volatile void __iomem *addr)
-{
-	volatile u32 __iomem *ptr = addr;
-	asm volatile("str %w0, %1" : : "rZ" (val), "Qo" (*ptr));
-}
-
-#define __raw_writeq __raw_writeq
-static __always_inline void __raw_writeq(u64 val, volatile void __iomem *addr)
-{
-	volatile u64 __iomem *ptr = addr;
-	asm volatile("str %x0, %1" : : "rZ" (val), "Qo" (*ptr));
-}
-
+#if defined(CONFIG_ARM64_ERRATUM_832075) || \
+	defined(CONFIG_NVIDIA_OLYMPUS_1027_ERRATUM)
+/* Keep the raw read overrides for the device-load erratum alternatives. */
 #define __raw_readb __raw_readb
 static __always_inline u8 __raw_readb(const volatile void __iomem *addr)
 {
@@ -102,6 +74,7 @@ static __always_inline u64 __raw_readq(const volatile void __iomem *addr)
 		     : "=r" (val) : "r" (addr));
 	return val;
 }
+#endif
 
 /* IO barriers */
 #define __io_ar(v)							\
@@ -125,6 +98,8 @@ static __always_inline u64 __raw_readq(const volatile void __iomem *addr)
 #define __io_br(v)
 #define __io_aw(v)
 
+#include <asm-generic/mmio.h>
+
 /* arm64-specific, don't use in portable drivers */
 #define __iormb(v)		__io_ar(v)
 #define __iowmb()		__io_bw()
-- 
2.43.0


  parent reply	other threads:[~2026-09-20  1:44 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-20  1:43 [PATCH v2 1/3] asm-generic: split MMIO accessors out of io.h Qingfang Deng
2026-09-20  1:43 ` [PATCH v2 2/3] riscv: use generic MMIO accessors Qingfang Deng
2026-09-20  8:11   ` Arnd Bergmann
2026-09-20  1:43 ` Qingfang Deng [this message]
2026-09-20  8:08   ` [PATCH v2 3/3] arm64: " Arnd Bergmann
2026-09-20  9:24     ` Qingfang Deng
2026-09-20  9:30       ` Arnd Bergmann
2026-09-20  9:35         ` Arnd Bergmann
2026-09-20  8:13 ` [PATCH v2 1/3] asm-generic: split MMIO accessors out of io.h Arnd Bergmann

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