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From: Petko Manolov <petko.manolov@konsulko.com>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	dinguyen@kernel.org, arnemaximilian.richter@draeger.com,
	martynas.grybauskas@draeger.com
Subject: Re: [PATCH v6 3/3] arm: dts: altera: add Draeger M48 CPU Module
Date: Sun, 20 Sep 2026 10:59:24 +0300	[thread overview]
Message-ID: <20260920075924.GC7878@cabron.k.g> (raw)
In-Reply-To: <20260918-strategic-hairy-kelpie-46e807@quoll>

On 26-09-18 13:57:22, Krzysztof Kozlowski wrote:
> On Thu, Sep 17, 2026 at 07:31:56PM +0300, Petko Manolov wrote:
> > Draeger M48 CPU Module that is built around Altera SoCFPGA.
> 
> How can you run a CPU module alone? To my knowledge there is only one such
> case, only one exception, and it was explained by the authors. If this is
> second, I already asked you to properly explain the hardware in commit msg.

I've described the board/carrier/module/whatever in the cover letter.  When i
put the same text in the commit message Sashiko rejected the patch on the
grounds that there should be just one CPU architecture there.  But there are
two.

> Your sentence above explains nothing.

Pleases read the above.  And now the explanation.

I'll try to describe the board once again.  Draeger folks are CCed so they can
correct me where i'm wrong.

This is a _proprietary_ board that consist of a carrier where the peripheral
devices live and SoM (hence 'module') where the _two_ SoCs live.  As i've
mentioned at least five times already, the imx6 and socfpga work _independently_
of each other but do _monitor_ each other constantly.  If one of the players
detect that the other one misbehaves or malfunctioned due to software or
hardware error, the respective, healthy SoC, takes over.

In this regard there's no _primary_ SoC as the other is capable of performing
the same tasks.  This is a heterogeneous board/module/younameit that is based on
two SoCs.  This is also not so uncommon in the industry.

This is where i am at right now:

	a) if i mention imx6 in the commit message of Altera socfpga binding or
	.dts Sashiko gets mad at me and rejects the patch;

	b) if i remove imx6 of the said commit you yell at me;

	c) M48 is a proprietary board with just one user - Draeger; 

I agree that my patches should not break the existing _semantic_ rules and they
should be refined before being accepted.

However, i do not understand why is it so hard for you to grasp the M48 concept
and apply some logic instead of stubbornness.  The commit message is not perfect
- how big of a deal is it?  Will it break anything important?  Either help me
make the commit message perfect or just accept it as it is.  We've already
wasted so much time on this stupid dts...


		Petko

  reply	other threads:[~2026-09-20  7:59 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-17 16:31 [PATCH v6 0/3] " Petko Manolov
2026-09-17 16:31 ` [PATCH v6 1/3] dt-bindings: vendor-prefixes: add Draeger AG Petko Manolov
2026-09-18 11:54   ` Krzysztof Kozlowski
2026-09-17 16:31 ` [PATCH v6 2/3] dt-bindings: arm: altera: add Draeger M48 Module Petko Manolov
2026-09-18 11:55   ` Krzysztof Kozlowski
2026-09-20  7:23     ` Petko Manolov
2026-09-17 16:31 ` [PATCH v6 3/3] arm: dts: altera: add Draeger M48 CPU Module Petko Manolov
2026-09-18 11:57   ` Krzysztof Kozlowski
2026-09-20  7:59     ` Petko Manolov [this message]
2026-09-20  9:52       ` Krzysztof Kozlowski

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