From: sashiko-bot@kernel.org
To: "Pratyush Yadav" <pratyush@kernel.org>,
"Michael Walle" <mwalle@kernel.org>,
"Miquel Raynal" <miquel.raynal@bootlin.com>,
"Vignesh Raghavendra" <vigneshr@ti.com>,
"Richard Weinberger" <richard@nod.at>,
"Takahiro Kuwano" <takahiro.kuwano@infineon.com>
Cc: "Steam Lin" <STLin2@winbond.com>,
"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 22/25] mtd: spi-nor: winbond: Add support for W25Q33PW-M
Date: Sun, 20 Sep 2026 14:15:16 +0000 [thread overview]
Message-ID: <20260920141517.2A0AD1F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260920-winbond-master-spi-nor-jw-cleanup-pw-addition-v2-22-ab9c9688d071@bootlin.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] mtd: spi-nor: winbond: W25Q33PW-M inline ECC incorrectly disabled by density check
--
commit a82dcd60aac8f24c79cf246f21c0a7afd4ac0ae0
Author: Miquel Raynal <miquel.raynal@bootlin.com>
mtd: spi-nor: winbond: Add support for W25Q33PW-M
There is an ID collision with chips of same density from the JW family
(which it self conflicted with yet another family). Chips are very
similar in practice, it is mostly a matter of electrical differences
(mostly power consumption being lower) as well as the addition of inline
ECC capability.
> diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
> index c1792b12db630..c56bb01c197b2 100644
> --- a/drivers/mtd/spi-nor/winbond.c
> +++ b/drivers/mtd/spi-nor/winbond.c
> @@ -467,7 +467,7 @@ static const struct flash_info winbond_nor_parts[] = {
> .size = SZ_64M,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> }, {
> - /* W25Q32JW-M */
> + /* W25Q32JW-M, W25Q33PW-M */
> .id = SNOR_ID(0xef, 0x80, 0x16),
> .name = "w25q32jwm",
[Severity: High]
The commit message states that the W25Q33PW-M chip supports inline ECC, but
does this newly added chip actually get its ECC configuration applied?
Looking at winbond_pw_with_ecc_match() in drivers/mtd/spi-nor/winbond.c:
static bool winbond_pw_with_ecc_match(const struct spi_nor *nor)
{
...
/* W25QxxPW densities <= 32 Mbit (id[2] <= 0x16) do not have built-in ECC support */
return id->len == 3 && id->bytes[2] >= 0x17;
}
Since the W25Q33PW-M has an ID of 0xef, 0x80, 0x16, the density byte is 0x16.
This causes winbond_pw_with_ecc_match() to unconditionally evaluate to false,
preventing the winbond_nor_ecc_configuration_post_sfdp_fixups from being
applied.
As a result, SNOR_F_ECC is never set and writesize remains 1 instead of 16.
Will this cause writes to be unaligned to the chip's 16-byte chunks, which
according to the commit message disables ECC locally until the next erase?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260920-winbond-master-spi-nor-jw-cleanup-pw-addition-v2-0-ab9c9688d071@bootlin.com?part=22
next prev parent reply other threads:[~2026-09-20 14:15 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-20 14:00 [PATCH v2 00/25] mtd: spi-nor: winbond: Cleanup JW family, add support for PW chips Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 01/25] mtd: spi-nor: winbond: W25Q32xW-Q/N: Enhance identification of the chips Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 02/25] mtd: spi-nor: winbond: W25Q64xW-Q/N: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 03/25] mtd: spi-nor: winbond: W25Q32xW-Q/N: Fill locking information Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 04/25] mtd: spi-nor: winbond: W25Q64xW-Q/N: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 05/25] mtd: spi-nor: winbond: W25Q128JW-Q/N: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 06/25] mtd: spi-nor: winbond: W25Q32JW-M: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 07/25] mtd: spi-nor: winbond: W25Q64JW-M: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 08/25] mtd: spi-nor: winbond: W25Q128JW-M: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 09/25] mtd: spi-nor: winbond: W25Q256JW-Q/N/M: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 10/25] mtd: spi-nor: winbond: W25Q32JW-Q/N: Add quad page program capability Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 11/25] mtd: spi-nor: winbond: W25Q64JW-Q/N: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 12/25] mtd: spi-nor: winbond: W25Q128JW-Q/N: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 13/25] mtd: spi-nor: winbond: W25Q32JW-M: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 14/25] mtd: spi-nor: winbond: W25Q64JW-M: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 15/25] mtd: spi-nor: winbond: W25Q128JW-M: " Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 16/25] mtd: spi-nor: winbond: Prepare introduction of W25QxxPW-Q/N parts Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 17/25] mtd: spi-nor: winbond: Add support for W25Q33PW-Q/N Miquel Raynal
2026-09-20 14:12 ` sashiko-bot
2026-09-20 14:37 ` Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 18/25] mtd: spi-nor: winbond: Add support for W25Q64PW-Q/N Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 19/25] mtd: spi-nor: winbond: Add support for W25Q12PW-Q/N Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 20/25] mtd: spi-nor: winbond: Add support for W25Q25PW-Q/N Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 21/25] mtd: spi-nor: winbond: Prepare introduction of W25QxxPW-M parts Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 22/25] mtd: spi-nor: winbond: Add support for W25Q33PW-M Miquel Raynal
2026-09-20 14:15 ` sashiko-bot [this message]
2026-09-20 14:00 ` [PATCH v2 23/25] mtd: spi-nor: winbond: Add support for W25Q64PW-M Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 24/25] mtd: spi-nor: winbond: Add support for W25Q12PW-M Miquel Raynal
2026-09-20 14:00 ` [PATCH v2 25/25] mtd: spi-nor: winbond: Add support for W25Q25PW-M Miquel Raynal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260920141517.2A0AD1F00893@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=STLin2@winbond.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=miquel.raynal@bootlin.com \
--cc=mwalle@kernel.org \
--cc=pratyush@kernel.org \
--cc=richard@nod.at \
--cc=sashiko-reviews@lists.linux.dev \
--cc=takahiro.kuwano@infineon.com \
--cc=thomas.petazzoni@bootlin.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®