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Mon, 21 Sep 2026 08:40:08 +0000 (GMT) Received: from tuxmaker.lnxne.boe (unknown [9.87.85.9]) by smtpav01.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 21 Sep 2026 08:40:08 +0000 (GMT) From: Heiko Carstens To: Alexander Gordeev , Sven Schnelle , Vasily Gorbik , Christian Borntraeger , Mete Durlu , Peter Zijlstra , Mark Rutland , Juergen Christ , Ilya Leoshkevich Cc: linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: [PATCH v3 10/11] s390/percpu: Use percpu code section for this_cpu_cmpxchg() Date: Mon, 21 Sep 2026 10:40:04 +0200 Message-ID: <20260921084005.4022574-11-hca@linux.ibm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260921084005.4022574-1-hca@linux.ibm.com> References: <20260921084005.4022574-1-hca@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Authority-Analysis: v=2.4 cv=V/XoQuni c=1 sm=1 tr=0 ts=6ab0ed6d cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8 a=xum8VS0YelhL0tLUZrYA:9 X-Proofpoint-ORIG-GUID: ju0TJJSwKm0qZ3_xW2dsI4jJJmnNf2zq X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIxMDEyMyBTYWx0ZWRfXz46mJ3GQ3JJj G2Z2ai8mvCMo2bhArKsP8ld8vsegEUxICEeIfD2kZkIR6K40n2LJ1a30qdVTHmvh8CBRrXWfhNf olWgdPbn5JTL2lC/ytBg3/tTjdmIIfLUj4l65QFBE8npkUiadrU0yB5MbTPQ4JlNFnsVxXxwzDR 4iiZH6pcOxnd9q3KXkDonb7IZhCthOwTTdUhSnprNwKQ22FCBDUuccSN25S0ABD+dHDCxq8GVxI REaA8qf2BnJpKahHgBL7QGZ1jn5AfnJtCxA5HsaGf1KWlXemRDNV+3WDbs/3b76ac636piX+7K7 1aUnuSVMgHevRJQhRQZ7YFYLHuaD57E+YiCSksce+uId938nDxshP2DLQ8xvgXeEDpjzpkLxRKo kMI8ug9o48D88Ig7wKQzEUmZcixj91wVG1+VvWbcAxWE+TI6MHkvqKPFmcQ80HFdeWCLA9+VaTP liTJ9KHvf3CDtAG3Zew== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIxMDEyMyBTYWx0ZWRfX1tmrSPRGPAZN /6ojni+0zHkmq5cg2tq2qjm6QwOIN9ryKQMoPIkyABu3n85wcKYgIbHroQUS5gQQcAdiCkcdvx2 mwaPeWoWhjD/gVbBhw/2RzWIprN5HLE= X-Proofpoint-GUID: ju0TJJSwKm0qZ3_xW2dsI4jJJmnNf2zq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_03,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 malwarescore=0 clxscore=1015 phishscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609210123 Convert this_cpu_cmpxchg() to make use of percpu code section functionality in order to get rid of preempt_disable() and preempt_enable() calls. Consider only four and eight byte usages, since there are no compare and swap instructions for one and two bytes available. For one and two bytes use the previous simple implementation. Signed-off-by: Heiko Carstens --- arch/s390/include/asm/percpu.h | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/arch/s390/include/asm/percpu.h b/arch/s390/include/asm/percpu.h index 237bf8c80843..46368131b932 100644 --- a/arch/s390/include/asm/percpu.h +++ b/arch/s390/include/asm/percpu.h @@ -290,7 +290,7 @@ do { \ #define this_cpu_write_4(pcp, val) arch_this_cpu_write(pcp, val, "st") #define this_cpu_write_8(pcp, val) arch_this_cpu_write(pcp, val, "stg") -#define arch_this_cpu_cmpxchg(pcp, oval, nval) \ +#define arch_this_cpu_cmpxchg_simple(pcp, oval, nval) \ ({ \ typedef typeof(pcp) pcp_op_T__; \ pcp_op_T__ ret__; \ @@ -302,10 +302,32 @@ do { \ ret__; \ }) -#define this_cpu_cmpxchg_1(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval) -#define this_cpu_cmpxchg_2(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval) -#define this_cpu_cmpxchg_4(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval) -#define this_cpu_cmpxchg_8(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval) +#define arch_this_cpu_cmpxchg(pcp, oval, nval, op) \ +({ \ + typedef typeof(pcp) pcp_op_T__; \ + pcp_op_T__ old__ = (oval), new__ = (nval); \ + pcp_op_T__ *ptr__; \ + \ + ptr__ = PERCPU_PTR(&(pcp)); \ + asm_inline volatile( \ + __PCPU_BEGIN("%[lcreg]","%[lcoff]","%[ptr__]") \ + op " %[old__],%[new__],0(%[ptr__])\n" \ + __PCPU_END("%[lcreg]") \ + : [old__] "+&d" (old__), \ + [ptr__] "+&a" (ptr__), "+m" (*ptr__), \ + "=m" (((struct lowcore *)0)->percpu_register) \ + : [new__] "d" (new__), \ + [lcreg] "i" (LC_PERCPU_REGISTER), \ + [lcoff] "i" (LC_PERCPU_OFFSET), \ + "m" (((struct lowcore *)0)->percpu_offset) \ + : "memory", "cc"); \ + old__; \ +}) + +#define this_cpu_cmpxchg_1(pcp, oval, nval) arch_this_cpu_cmpxchg_simple(pcp, oval, nval) +#define this_cpu_cmpxchg_2(pcp, oval, nval) arch_this_cpu_cmpxchg_simple(pcp, oval, nval) +#define this_cpu_cmpxchg_4(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval, "cs") +#define this_cpu_cmpxchg_8(pcp, oval, nval) arch_this_cpu_cmpxchg(pcp, oval, nval, "csg") #define this_cpu_cmpxchg64(pcp, o, n) this_cpu_cmpxchg_8(pcp, o, n) -- 2.53.0