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Mon, 21 Sep 2026 14:29:07 -0700 (PDT) X-Received: by 2002:a17:902:e745:b0:2dd:ad73:c98d with SMTP id d9443c01a7336-2ddb1bdefcdmr158851845ad.37.1790026146755; Mon, 21 Sep 2026 14:29:06 -0700 (PDT) Received: from localhost ([50.35.44.179]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33e5eabe1b9sm780432eec.2.2026.09.21.14.29.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Sep 2026 14:29:06 -0700 (PDT) Date: Mon, 21 Sep 2026 14:29:03 -0700 From: Jonathan Cameron To: Suzuki K Poulose Cc: kvm@vger.kernel.org, kvmarm@lists.linux.dev, maz@kernel.org, will@kernel.org, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, steven.price@arm.com, aneesh.kumar@kernel.org, oupton@kernel.org, gshan@redhat.com, joey.gouly@arm.com, tabba@google.com, yuzenghui@huawei.com, linux-coco@lists.linux.dev, gankulkarni@os.amperecomputing.com, sdonthineni@nvidia.com, alpergun@google.com, fj0570is@fujitsu.com, WeiLin.Chang@arm.com, lpieralisi@kernel.org, enju.kohei@fujitsu.com Subject: Re: [PATCH v18 1/7] firmware: arm_rmm: Add SMC definitions for calling the RMM Message-ID: <20260921142903.000071d7@oss.qualcomm.com> In-Reply-To: References: <20260912083611.2513845-1-suzuki.poulose@arm.com> <20260912083611.2513845-2-suzuki.poulose@arm.com> <178978126540.2352296.16845657485139032765.b4-review@b4> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIxMDMxNCBTYWx0ZWRfX8EA/uRrETXnE 2bmqfMcNn6e5VdF9959HkpOjOql9kon5GNQTprbgR+OPl7v+ebiUPbuY7hCcXeNipXqU9WfKYCl ulvBUUe4ZvT/lVtH1KAWmiaf00V1MIc= X-Authority-Analysis: v=2.4 cv=AsR7T+9P c=1 sm=1 tr=0 ts=6ab1a1a4 cx=c_pps a=cmESyDAEBpBGqyK7t0alAg==:117 a=aNnz9XPx1a4JIXSYt2cE/A==:17 a=8nJEP1OIZ-IA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=7CQSdrXTAAAA:8 a=ZpRu-6ZVBUCh-PS3OmgA:9 a=wPNLvfGTeEIA:10 a=1OuFwYUASf3TG4hYMiVC:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-GUID: HyHKb8r4Oi1C9KhabmU0Yf0nvQxubg2b X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIxMDMxNCBTYWx0ZWRfX+dqfBM9cRX5k kdRxSwOQz8RH05uDCL43VZ1xgBmp5MyaMikdK+pbQNArPMfmCVpY5j3eYzkLHO1RiTa64g105TC RuO+Btj/O1Hm8Nk0xvLkXT1SfVJUL1gWMi2qv1mBAM0QcX+JHvS37zHOXhyrhg9gWSBn2tV/7ob WbABR0N92BivrRLT9wGcuDmdYqLUOTZgOQNgnusxeaS1ug6tqDL/fOLtlyqnUYM3Uj/Rtc3eoMq pPHv79/grVoBNsz55/oH8/nBPXyvStbC7fFo9Pjt3YEji0m06O4xQwtEH7w2M4WBlWB75bKqVpk ZbTt8XLJHeL80QhfEl2ItxXhIBAG1IEnLTeFOFxPfmwPTVj8RLu/cP9JZrAelAotdVWvcq48VHo 2szOXW5NysBTe8awyfSd2n/cW+Wi+ycRMZzccxjpOYRE8EKpFpiatFuRKkTrAUS0bioa32qNnWi bg638FTmzGZcXuA+WfQ== X-Proofpoint-ORIG-GUID: HyHKb8r4Oi1C9KhabmU0Yf0nvQxubg2b X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_06,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 spamscore=0 malwarescore=0 suspectscore=0 clxscore=1015 impostorscore=0 adultscore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609210314 On Mon, 21 Sep 2026 11:14:22 +0100 Suzuki K Poulose wrote: > On 21/09/2026 10:27, Suzuki K Poulose wrote: > > On 19/09/2026 02:27, Jonathan Cameron wrote: =20 > >>> The RMM (Realm Management Monitor) provides functionality that can be > >>> accessed by SMC calls from the host. > >>> > >>> The SMC definitions are based on DEN0137[1] version 2.0-bet3 > >>> > >>> [1] https://developer.arm.com/documentation/den0137/2-0bet3/ > >>> > >>> Signed-off-by: Steven Price > >>> Signed-off-by: Suzuki K Poulose =20 > >> > >> With Gavin's nitpicks and the GENMASK_ULL() from sashiko, just a few > >> comments inline.=A0 Mostly on subtle inconsistencies that really don't > >> matter that much. > >> =20 > >>> =A0 include/linux/arm-smccc-rmi.h | 497 +++++++++++++++++++++++++++++= +++++ > >>> =A0 1 file changed, 497 insertions(+) > >>> =A0 create mode 100644 include/linux/arm-smccc-rmi.h > >>> > >>> diff --git a/include/linux/arm-smccc-rmi.h b/include/linux/arm-smccc-= =20 > >>> rmi.h > >>> new file mode 100644 > >>> index 000000000000..214d6228dfc2 > >>> --- /dev/null > >>> +++ b/include/linux/arm-smccc-rmi.h =20 >=20 > .. >=20 > >>> + > >>> +struct rec_exit { > >>> +=A0=A0=A0 union { /* 0x000 */ > >>> +=A0=A0=A0=A0=A0=A0=A0 u8 exit_reason; > >>> +=A0=A0=A0=A0=A0=A0=A0 u8 padding0[0x100]; =20 >=20 > ... >=20 > >> =20 > >>> +=A0=A0=A0 }; > >>> +=A0=A0=A0 union { /* 0x400 */ > >>> +=A0=A0=A0=A0=A0=A0=A0 struct { > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 cntp_ctl; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 cntp_cval; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 cntv_ctl; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 cntv_cval; > >>> +=A0=A0=A0=A0=A0=A0=A0 }; > >>> +=A0=A0=A0=A0=A0=A0=A0 u8 padding4[0x100]; > >>> +=A0=A0=A0 }; > >>> +=A0=A0=A0 union { /* 0x500 */ > >>> +=A0=A0=A0=A0=A0=A0=A0 struct { > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 ripas_base; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 ripas_top; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 ripas_value; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 padding5[0xf]; =20 > >> > >> In various other places you just use a u64 for a u8 > >> + padding. Why is this one special? And for that matter > >> various other fields later in this particular structure? =20 > >=20 > > Please feel free to point out, if you spot any. I am happy > > to fix them. =20 >=20 > I took a look and the padding is for extra "u64" bits in there. > e.g, ripas_value offset =3D 0x510 and the s2ap_base is really at 0x520 > not 0x518. Same applies for the pmu_ovf_status and vsmmu. >=20 > So, I would leave them as they are. The rest are consistent. > e.g, num_bps and num_wps. in realm_parameter Ok. That's logical enough for me. When no padding happens to follow that goes beyond the u64 then use that for simplicity and if there is padding anyway use a u8[] that include the rest of the u64 and the next bit Thanks for talking me through it! Jonathan >=20 > Cheers > Suzuki >=20 >=20 > > =20