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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Exchange-RoutingPolicyChecked: F8CzviGSZAgx7iKoU7p0Q9oGs3mSc2Yw+0QjzeEZbj6e8cjnm0+o+EktHGXvfxUqJrOYuVj1OeC527w/Ok7uFqe4WvAoGbeLyhv3qcmzP15s4Q46jDvmcbUJ+iwIA9BUcXHejU2DZ7dbTcIcBY+82Alo1toWGZXo1jsdl8cQ29RDeAsXCfdww5vPp9ehNdXk77lv8RofaA5IXBGUMRIv4b2Lc3jwe4WDcaJdc4U0WCHIA1baMD2dGOS20zvnV++ZAPkLMzGbuk5rO3QFG4BWghVRv5pWvPm5px0/9FeRnnk8Xrdz84e6fGH0CdSu/z1auUPgnBXiPuXsNgk6IAlBtw== X-OriginatorOrg: sitime.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: LVWPR20MB994915.namprd20.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 2a2e9d18-8745-467e-e33a-08df1821cfae X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Sep 2026 20:49:20.3713 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 8fb55916-cf10-4b0d-96f4-cf3952657263 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: nQnMgzwRsWJVWRfcSAr3K88ROcDQp4dsFrpL822VrnYZW2zoM+RsHuA3ois4Obt5Onywzy/0sJMMNKtc9CYxEQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS6PR20MB266123 X-MDID: 1790023765-pKXBMGgco0iV X-PPE-STACK: {"stack":"us1"} X-MDID-O: us1;at1;1790023765;pKXBMGgco0iV;;ee4c095510f4a2bc549243be2f087a38 X-PPE-TRUSTED: V=1;DIR=OUT; On 9/17/26 11:42 AM, Ivan Vecera wrote:=0A= >> + /*=0A= >> + * The fine step is 30 ps, but requests are accepted at 1 ps=0A= >> + * resolution and rounded to the nearest achievable delay, so=0A= >> + * advertise the request granularity, not the hardware step.=0A= >> + */=0A= >> + props->dpll_props.phase_gran =3D 1;=0A= > =0A= > What is the real HW granularity? If 30ps then you should announce 30 to = =0A= > inform the userspace that this is the step supported by the HW.=0A= =0A= There is no single hardware step on this part, and phase-gran is not=0A= only advisory: the core rejects any request that is not a multiple of=0A= it, in dpll_pin_phase_adjust_set().=0A= =0A= if (pin->prop.phase_gran && phase_adj % (s32)pin->prop.phase_gran) {=0A= NL_SET_ERR_MSG_ATTR_FMT(extack, phase_adj_attr,=0A= "phase adjust value not multiple of %u",= =0A= pin->prop.phase_gran);=0A= return -EINVAL;=0A= }=0A= =0A= So whatever the driver announces becomes a filter on what userspace is=0A= allowed to ask for, and that is what makes 30 the wrong number here.=0A= =0A= A requested delay is split between two fields that are added, not=0A= selected between: a coarse delay counted in whole VCO cycles, and a=0A= three-bit fine field in fixed 30 ps steps. The reachable delays are=0A= =0A= coarse * T_vco + fine * 30 ps, fine in 0..7=0A= =0A= where T_vco is the VCO period in force. For 30 to be the right modulus,=0A= T_vco would have to be an exact multiple of 30 ps. It is not. The=0A= feedback divider is fractional, so Fvco is XO * (DIVN_INT + NUM/DEN)=0A= times the doubler, and the period that falls out of that does not land=0A= on a 30 ps boundary. As soon as one coarse cycle is part of a delay,=0A= the reachable values are offset by that remainder and stop being=0A= multiples of 30 at all.=0A= =0A= Take T_vco =3D 240.5 ps purely as arithmetic. The reachable delays are=0A= 0, 30 ... 210, then 240.5, 270.5, and so on. Announcing 30 against that=0A= set would be wrong in both directions at once: the core would reject=0A= 240.5, which the device produces exactly, and accept 240, which it=0A= cannot produce at all. A faster or slower VCO does not fix this, it=0A= only moves where the mismatch starts, and Fvco differs per PLL and per=0A= board.=0A= =0A= Announcing T_vco instead would at least describe the coarse field, but=0A= it discards the fine one: the core would then refuse every delay that=0A= is not a whole number of VCO cycles, and the 30 ps resolution inside a=0A= cycle becomes unreachable through the ABI. It is not exact either,=0A= since phase-gran is an integer number of picoseconds and T_vco is not.=0A= =0A= So the driver announces 1, accepts the request, rounds it to the=0A= nearest delay the two fields can represent, and reports back what the=0A= registers hold rather than what was asked for. A caller that needs the=0A= exact applied value reads it back and gets the truth for its own VCO=0A= rate.=0A= =0A= I recognize this leaves phase-gran carrying less information than it=0A= does for zl3073x, where one output period is a genuine step and the=0A= readback scales by it. If you would rather the attribute describe the=0A= coarse field even at the cost of the fine one, I will announce T_vco=0A= instead. I did not want to close off the resolution inside a VCO cycle=0A= in order to make a single number look tidy.=0A= =0A= This is unchanged in v10, with the reasoning set out in the cover=0A= letter:=0A= https://lore.kernel.org/netdev/20260921201108.42676-1-arouhi@sitime.com/=0A= =0A= Thanks,=0A= Ali=0A=