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Its task is to bind to the qce DT node, set up runtime PM for interconnect down-scaling and register the auxiliary device using the crypto offloader driver. Signed-off-by: Bartosz Golaszewski --- drivers/soc/qcom/Kconfig | 11 ++++++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/qce-core.c | 92 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 104 insertions(+) diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index 2b524154d9fb331199fb162e43b0acfc03eced6b..859835a3dd1d98d1e4099f708d75f36ca89d3f3e 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -122,6 +122,17 @@ config QCOM_PMIC_GLINK Say yes here to support USB-C and battery status on modern Qualcomm platforms. +config QCOM_CRYPTO_CORE + tristate "Qualcomm Crypto Engine core driver" + depends on PM + select AUXILIARY_BUS + help + Core driver for the Qualcomm Crypto Engine. Say yes here to enable + the top-level driver that binds to the devicetree node representing + the QCE, registers the sub-devices implementing actual QCE + functionalities and sets up runtime PM allowing the interconnects to + scale down. + config QCOM_RAMP_CTRL tristate "Qualcomm Ramp Controller driver" help diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 798643be3590cc8303854658fd483b7807d2230f..33dfef07e7db2c0488b14c78f098afebf689d013 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_QCOM_PMIC_GLINK) += pmic_glink.o obj-$(CONFIG_QCOM_PMIC_GLINK) += pmic_glink_altmode.o obj-$(CONFIG_QCOM_PMIC_PDCHARGER_ULOG) += pmic_pdcharger_ulog.o CFLAGS_pmic_pdcharger_ulog.o := -I$(src) +obj-$(CONFIG_QCOM_CRYPTO_CORE) += qce-core.o obj-$(CONFIG_QCOM_QMI_HELPERS) += qmi_helpers.o qmi_helpers-y += qmi_encdec.o qmi_interface.o obj-$(CONFIG_QCOM_RAMP_CTRL) += ramp_controller.o diff --git a/drivers/soc/qcom/qce-core.c b/drivers/soc/qcom/qce-core.c new file mode 100644 index 0000000000000000000000000000000000000000..8a9d070935cc87eaf20ae2db25f304cf4b2694c0 --- /dev/null +++ b/drivers/soc/qcom/qce-core.c @@ -0,0 +1,92 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2026 Qualcomm Technologies, Inc. and/or its subsidiaries + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define QCE_DEFAULT_MEM_BANDWIDTH 393600 + +static const char *const qce_core_aux_devs[] = { "crypto", NULL }; + +static int qce_core_probe(struct platform_device *pdev) +{ + static const char *const *subdev; + struct auxiliary_device *auxdev; + struct device *dev = &pdev->dev; + struct icc_path *mem_path; + int ret; + + mem_path = devm_of_icc_get(&pdev->dev, "memory"); + if (IS_ERR(mem_path)) + return PTR_ERR(mem_path); + + dev_set_drvdata(dev, mem_path); + + ret = devm_pm_runtime_enable(dev); + if (ret) + return ret; + + PM_RUNTIME_ACQUIRE(dev, pm); + ret = PM_RUNTIME_ACQUIRE_ERR(&pm); + if (ret) + return ret; + + for (subdev = qce_core_aux_devs; *subdev; subdev++) { + auxdev = __devm_auxiliary_device_create(dev, "qce", *subdev, NULL, 0); + if (IS_ERR(auxdev)) + return PTR_ERR(auxdev); + } + + return 0; +} + +static int qce_core_runtime_suspend(struct device *dev) +{ + struct icc_path *mem_path = dev_get_drvdata(dev); + + return icc_set_bw(mem_path, 0, 0); +} + +static int qce_core_runtime_resume(struct device *dev) +{ + struct icc_path *mem_path = dev_get_drvdata(dev); + + return icc_set_bw(mem_path, QCE_DEFAULT_MEM_BANDWIDTH, + QCE_DEFAULT_MEM_BANDWIDTH); +} + +static const struct dev_pm_ops qce_core_pm_ops = { + RUNTIME_PM_OPS(qce_core_runtime_suspend, qce_core_runtime_resume, NULL) + SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) +}; + +static const struct of_device_id qce_core_of_match[] = { + { .compatible = "qcom,crypto-v5.1" }, + { .compatible = "qcom,crypto-v5.4" }, + { .compatible = "qcom,qce" }, + { } +}; +MODULE_DEVICE_TABLE(of, qce_core_of_match); + +static struct platform_driver qce_core_driver = { + .probe = qce_core_probe, + .driver = { + .name = KBUILD_MODNAME, + .of_match_table = qce_core_of_match, + .pm = pm_ptr(&qce_core_pm_ops), + }, +}; +module_platform_driver(qce_core_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Qualcomm crypto engine core driver"); +MODULE_ALIAS("platform:" KBUILD_MODNAME); +MODULE_AUTHOR("Bartosz Golaszewski "); -- 2.47.3