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Received: from 77-249-17-252.cable.dynamic.v4.ziggo.nl ([77.249.17.252] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8vtm-00000007krB-3azy; Tue, 22 Sep 2026 08:30:47 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 5FE2F300708; Tue, 22 Sep 2026 10:30:46 +0200 (CEST) Date: Tue, 22 Sep 2026 10:30:46 +0200 From: Peter Zijlstra To: Sean Christopherson Cc: Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Paolo Bonzini , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Dapeng Mi , Jim Mattson , Mingwei Zhang , Stephane Eranian , Sashiko Bot Subject: Re: [PATCH v4 00/10] perf/x86: Don't write PEBS_ENABLED on KVM transitions Message-ID: <20260922083046.GY4121339@noisy.programming.kicks-ass.net> References: <20260921191418.950933-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260921191418.950933-1-seanjc@google.com> On Mon, Sep 21, 2026 at 12:14:08PM -0700, Sean Christopherson wrote: > Sean Christopherson (10): > perf/x86/intel: Ensure guest PEBS path doesn't set unwanted > PERF_GLOBAL_CTRL bits > perf/x86/intel: Don't write PEBS_ENABLED on host<=>guest xfers if CPU > has isolation > perf/x86/intel: Don't context switch DS_AREA (and PEBS config) if PEBS > is unused > perf/x86/intel: Make @data a mandatory param for > intel_guest_get_msrs() > perf/x86/intel: Invert names of intel_ctrl_{guest,host}_mask > perf/x86: KVM: Have perf define a dedicated struct for getting guest > PEBS data > perf/x86/intel: KVM: Handle cross-mapped PEBS PMCs entirely within KVM > KVM: VMX: Drop a redundant pmu->global_ctrl check when processing > pebs_enable > KVM: VMX: Only tell perf to enable PEBS counters for fully enabled > PMCs > perf/x86/intel: Check only PMC bits in PEBS_ENABLED when detecting > host PEBS usage > > arch/x86/events/core.c | 5 +- > arch/x86/events/intel/core.c | 94 +++++++++++++++++++------------ > arch/x86/events/intel/lbr.c | 2 +- > arch/x86/events/perf_event.h | 7 ++- > arch/x86/include/asm/kvm_host.h | 9 --- > arch/x86/include/asm/perf_event.h | 11 +++- > arch/x86/kvm/vmx/pmu_intel.c | 28 ++++++--- > arch/x86/kvm/vmx/vmx.c | 10 ++-- > arch/x86/kvm/vmx/vmx.h | 15 ++++- > 9 files changed, 115 insertions(+), 66 deletions(-) Thanks, split in two and queued in perf/urgent and perf/core. I'll push to tip in a day or so unless the robots scream.