From: <sun.wenhan@zte.com.cn>
To: <pjw@kernel.org>
Cc: <palmer@dabbelt.com>, <aou@eecs.berkeley.edu>, <alex@ghiti.fr>,
<sun.wenhan@zte.com.cn>, <linux-riscv@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <liu.qingtao2@zte.com.cn>,
<lv.yating@zte.com.cn>, <guo.chang2@zte.com.cn>,
<deng.weixian@zte.com.cn>, <hu.yuye@zte.com.cn>
Subject: [PATCH] riscv: align pcie bus assign logic with ARM64
Date: Tue, 22 Sep 2026 17:19:30 +0800 (CST) [thread overview]
Message-ID: <202609220934.68M9Y2eC015972@mse-db.zte.com.cn> (raw)
From: sun wenhan <sun.wenhan@zte.com.cn>
RISC-V currently relies on the asm-generic default of
pcibios_assign_all_busses() returning 1, so the kernel always
re-assigns all PCI bus numbers and ignores the bus numbers already
set up by the firmware. This has two downsides:
1. As UEFI 2.8 has brought mature firmware support to RISC-V servers,
the OS can trust and inherit the PCI bus enumeration done by the
BIOS, skipping a redundant re-enumeration at boot and improving
the boot time.
2. The unconditional re-assignment causes bus numbering conflicts
during PCI rescan. When a root port that is not the last one in
the hierarchy is removed and the bus is rescanned, the kernel
fails with:
pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under
[bus 00-ff] (conflicts with (null) [bus 02])
as reported for the same generic code in commit bd8cbe66c01d
("PCI: Make PCI bus renumbering configurable to avoid rescan
conflicts").
Define pcibios_assign_all_busses() the same way as ARM64,
so that RISC-V also preserves the bus numbers assigned by the
firmware by default instead of always re-assigning them. This keeps
RISC-V consistent with the other major architectures.
Signed-off-by: sun wenhan <sun.wenhan@zte.com.cn>
---
arch/riscv/include/asm/pci.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/include/asm/pci.h b/arch/riscv/include/asm/pci.h
index cc2a184cfc2e..b2f91abebd61 100644
--- a/arch/riscv/include/asm/pci.h
+++ b/arch/riscv/include/asm/pci.h
@@ -15,6 +15,11 @@
#define PCIBIOS_MIN_IO 4
#define PCIBIOS_MIN_MEM 16
+/*
+ * Set to 1 if the kernel should re-assign all PCI bus numbers
+ */
+#define pcibios_assign_all_busses() (pci_has_flag(PCI_REASSIGN_ALL_BUS))
+
#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
static inline int pcibus_to_node(struct pci_bus *bus)
{
--
2.27.0
reply other threads:[~2026-09-22 9:34 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=202609220934.68M9Y2eC015972@mse-db.zte.com.cn \
--to=sun.wenhan@zte.com.cn \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=deng.weixian@zte.com.cn \
--cc=guo.chang2@zte.com.cn \
--cc=hu.yuye@zte.com.cn \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=liu.qingtao2@zte.com.cn \
--cc=lv.yating@zte.com.cn \
--cc=palmer@dabbelt.com \
--cc=pjw@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®