From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sender5-op-o11.zoho.com (sender5-op-o11.zoho.com [165.173.182.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F3274AA41E for ; Thu, 24 Sep 2026 18:11:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=165.173.182.11 ARC-Seal:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790273470; cv=pass; b=uZKa/S1gkUwgk5s+P7tbowXohAg/IEgH8xEhRg1d1LM5wOY6Y79+Ou4Z/ttE/q8e/YxqDcfD9TUDsFICUeNXjNCcvJ5k3pder8sb70vMuJtIOUqU5FfmGm5vKSWIIP0FeNdY4RbO4/VEaIXJfBjKynmdPpr60xppYwWlRIP6RGw= ARC-Message-Signature:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790273470; c=relaxed/simple; bh=dCZp07NerU8D42mSnPseZzmMAYpKZeDxLr3cwlbPZjQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tsJUmcqzYSG/gOX/VO8wsop2axwl6wA4H6OiifKGwCBspCnzEUOaJRu1f1T4ii9Fbu5wnXQcj6TidNcmH/sHDCc+XxQFH9O9hbZvh8ezk+icRsi3CBBD0uUp1hpBXZbUU5l2rw/D+E4Hh9vcIdoK1prBCHyGoxnzgnbKvRAAuFo= ARC-Authentication-Results:i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=RlryaJYb; arc=pass smtp.client-ip=165.173.182.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="RlryaJYb" ARC-Seal: i=1; a=rsa-sha256; t=1790273437; cv=none; d=zohomail.com; s=zohoarc; b=i1FREIrN9hfnksC6TSO38b4C4Zd0Vhf6mW87A0y/xKzN+bqrAbiC2L637xbiHobQiRGTdJG+b5PL7mhOPssxHq7eqGV3eXPSmioPa6uhboTEITfaOydaEWLSvmUICgUDK7YLylEkzATrwEf3HAlNHs49gBpPFVIgqOBATHniPqA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790273437; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=FgBUfr7XdfPX5KK6ThKAqxZq8TJ6+L7WggmETMJZkoE=; b=PEFNvT7hYd6Iz702OcIHd/CIYUNQ9UOy+Nz/zIMtzm7pkTLSeL6vPa1SLGLXL6DjFdFbKPq6SzBKG9RcZwYa2ijdj3+kIdEpcE2XXiHq/5Xc6RSCjzM2zI1Eli84eRU0N3WFzd4o3Gf2pHhbHdJPW5L3Y4tWor9umKkANIX+A4g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1790273437; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=FgBUfr7XdfPX5KK6ThKAqxZq8TJ6+L7WggmETMJZkoE=; b=RlryaJYbRjLHyCld6hpLQ89ZKdkGT5ZTeYhbXoFxXrt3UIkNedK/gZMbFFpxem74 VcmY/LMFQejCMnpwyT8z0R57vCjW+haIJVS56taDS7ZcxvehKf6T+v2StyJBAmlzwzQ L4BMKECe+B+dhWrQO6PA7tbBV5e6KSn3Xoa162Wc= Received: by smtp.zohomail.com with SMTPS id 1790273436022304.710715791776; Thu, 24 Sep 2026 11:10:36 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Thu, 24 Sep 2026 19:09:27 +0100 Subject: [PATCH v10 10/15] drm/panfrost: Add debugfs knob for manually triggering a GPU reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20260924-claude-fixes-v10-10-755929b3cc19@collabora.com> References: <20260924-claude-fixes-v10-0-755929b3cc19@collabora.com> In-Reply-To: <20260924-claude-fixes-v10-0-755929b3cc19@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2966; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=dCZp07NerU8D42mSnPseZzmMAYpKZeDxLr3cwlbPZjQ=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqtWdZcWl58rHtc0EzLcd0cJ6nXUkP+2oJToLXE 4WGjAXZWWeJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCarVnWQAKCRAOJn5M7lND PbWZC/4118W5fqOq9h9eq6BfUbOnkW5oD95fCwq/F5gb8P/ki72EynY+0if1taSXgLz3DGlaUE1 eAhdy0FEBfbRleGF8+TO5m0S8Sk5/2LgYpmVLW56xJKLa6CjCZRZ3fKpsqAxS4vjywmswfLCZ4O BOa8BXeiI/U6IWIpwJoqG190r/WsSaV0Kt07oL4JIv64dzQmubTDDRWsCeoENK10zUc+2htNy5r 2UZQpYNAWA0CiaMvckHA3weGCtbvyTBC11AhY39kE60GejSojfItgH0CBZijwOnT959Wb+kGOfd BqV55Qe3CaKEq4DRuy57P15kkW1Qeys8qYh2SDab79UZGDoRC3bUCN37FlctVmQXtxBpR3wg1F3 r2cnof8NyAfjmnaRH+ZFd4LPJ6s5TF5VXBNvI5aHaPQlW7ByhDiAFKntSR8Q9b6mN3lxeu723pI iPCvjoX29/Ky2WQf1UdU/exYZ7hh1st2X9ieH6EONR0Ep4ngASrJ3uO8XnLlMPxcHBaKE= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D This will be of great help when testing potential races between the GPU reset sequence and other parts of the code accessing HW registers. We must also disable the reset work item rather than simply cancelling it, to prevent the knob from triggering another reset when the device is being removed. Reviewed-by: Boris Brezillon Signed-off-by: Adrián Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 42 ++++++++++++++++++++++++++++++ drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c index e6de71e99ab4..fd5046b363e9 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -2,6 +2,7 @@ /* Copyright 2018 Marty E. Plummer */ /* Copyright 2019 Linaro, Ltd, Rob Herring */ +#include #include #include #include @@ -587,9 +588,50 @@ EXPORT_GPL_DEV_PM_OPS(panfrost_pm_ops) = { }; #ifdef CONFIG_DEBUG_FS +static int reset_get(void *data, u64 *val) +{ + struct panfrost_device *pfdev = + container_of(data, struct panfrost_device, base); + + *val = atomic_read(&pfdev->reset.pending); + return 0; +} + +static int reset_set(void *data, u64 val) +{ + struct panfrost_device *pfdev = + container_of(data, struct panfrost_device, base); + int ret = pm_runtime_get_if_active(pfdev->base.dev); + + if (!ret) + return 0; + + panfrost_device_schedule_reset(pfdev); + flush_work(&pfdev->reset.work); + + /* ret < 0 means runtime PM for the device is disabled, so we + * only need to return the PM reference in the opposite case + */ + if (ret > 0) + pm_runtime_put(pfdev->base.dev); + + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(panfrost_reset_debugfs_fops, + reset_get, reset_set, + "0x%08llx\n"); + +static void panfrost_reset_debugfs_init(struct drm_minor *minor) +{ + debugfs_create_file("reset", 0600, minor->debugfs_root, + minor->dev, &panfrost_reset_debugfs_fops); +} + void panfrost_device_debugfs_init(struct drm_minor *minor) { panfrost_gem_debugfs_init(minor); panfrost_sched_debugfs_init(minor); + panfrost_reset_debugfs_init(minor); } #endif // CONFIG_DEBUG_FS diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c index 00fb36c577df..ab65786bf63b 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -932,7 +932,7 @@ void panfrost_jm_fini(struct panfrost_device *pfdev) drm_sched_fini(&js->queue[j].sched); } - cancel_work_sync(&pfdev->reset.work); + disable_work_sync(&pfdev->reset.work); destroy_workqueue(pfdev->reset.wq); } -- 2.55.0