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Thu, 24 Sep 2026 06:21:39 -0400 (EDT) From: Jiaxing Hu To: tomeu@tomeuvizoso.net, heiko@sntech.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, joro@8bytes.org, will@kernel.org, robin.murphy@arm.com, ulfh@kernel.org, p.zabel@pengutronix.de, ogabbay@kernel.org, zhangqing@rock-chips.com Cc: royalnet026@gmail.com, abel.vesa@oss.qualcomm.com, sebastian.reichel@collabora.com, sidong.yang@furiosa.ai, u.kleine-koenig@baylibre.com, chaoyi.chen@rock-chips.com, diederik@cknow-tech.com, alchark@flipper.net, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, iommu@lists.linux.dev, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jiaxing Hu Subject: [PATCH v14 00/15] accel/rocket: RK3576 NPU (RKNN) enablement Date: Thu, 24 Sep 2026 22:21:20 +1200 Message-ID: <20260924102135.92217-1-gahing@gahingwoo.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit This adds the RK3576 NPU to accel/rocket. The RK3576 has two cores of the RKNN block the driver supports on RK3588, with more clocks, two power domains per core, one reset instead of two, and a sixteen-bit task number in PC_TASK_CON. 1/15 is Igor Paunovic's patch and also 05/11 of his DVFS series; whichever lands first, the other drops it. His 06/11 edits the same binding as 6/15. Changes since v13: 3/15 The comment notes that a core still up with runtime PM disabled is left unmasked (Sashiko). The message quotes Igor's re-runs on v13; his earlier summary is behind the Links. Igor, say if you want it back. 7/15 Heiko's Reviewed-by. 9/15 Message trimmed (Ulf), keeping one sentence on need_regulator. 10/15 One reset, not an array (Philipp), and the pointer is cleared under pmu->mutex before it is put (Sashiko). Abel, the code under your Reviewed-by changed; say if the tag should go. 12/15 Drops a claim that its test was byte exact; it was within one count. Its comment on PC_TASK_CON now says the count clear lands inside the task number and inflates it, which is what happens. 13/15, 14/15 v13's 13/14, split as Heiko asked. 14/15 gives 786 MHz at 750 mV as 11 to 25 wrong words a pass; v12 and v13 said 13 to 20 wrong rows, which no record supports. The other messages, apart from 1/15, are shorter. On Heiko's question, 9/15's delay at 0 makes the first power-on of the NPU domain take an async SError, also with vdd_npu_s0 always-on; at 15 us, 536 cold power-ons were clean. Details are in the v13 9/14 thread: https://lore.kernel.org/all/20260924090824.38493-1-gahing@gahingwoo.com/ Routing: Ulf offered to take 7, 9 and 10. 1 to 5, 11 and 12 go through accel, 13 to 15 through rockchip, 6 with accel and 8 with the DT patches that use it. 15/15 needs 9, 10 and 12 to 14 first; without 9, 10 and 13 the NPU domain comes up with no settle delay or reset pulse and the board takes an SError at boot. Still open: 4/15 whether you want a fix for the asynchronous put, and which 5/15 moves the line that ZhaoJinming's "accel/rocket: Fix iommu_group leak and unsafe IRQ register access" changes; whichever lands first, the other conflicts 14/15 both NPU domains per core, as tested, or one -- rocket_core_fini() puts the IOMMU group before it cancels the timeout worker: fix it here or on its own 15/15 hold it a cycle, or coordinate the three trees Link to v13: https://lore.kernel.org/all/20260915104328.45901-1-gahing@gahingwoo.com/ Igor Paunovic (1): accel/rocket: request the core clocks by name Jiaxing Hu (14): accel/rocket: take the completion register writes under job_lock accel/rocket: wait for a running IRQ handler before resetting a core accel/rocket: let the core suspend after a reset accel/rocket: factor the completion tail out of the IRQ handler dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core dt-bindings: power: rockchip: allow resets in a power domain node dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU pmdomain: rockchip: add optional per-domain power-on settle delay pmdomain: rockchip: cycle an optional power-domain reset on power-on accel/rocket: select the per-core clock and reset counts from match data accel/rocket: add RK3576 NPU (RKNN) support arm64: dts: rockchip: add NPU core domain clocks and resets to rk3576 arm64: dts: rockchip: add NPU (RKNN) nodes to rk3576 arm64: dts: rockchip: enable the NPU on rk3576-rock-4d .../bindings/iommu/rockchip,iommu.yaml | 28 ++++ .../npu/rockchip,rk3588-rknn-core.yaml | 47 +++++- .../power/rockchip,power-controller.yaml | 8 + .../boot/dts/rockchip/rk3576-rock-4d.dts | 22 +++ arch/arm64/boot/dts/rockchip/rk3576.dtsi | 86 +++++++++- drivers/accel/rocket/rocket_core.c | 32 +++- drivers/accel/rocket/rocket_core.h | 11 +- drivers/accel/rocket/rocket_device.c | 7 +- drivers/accel/rocket/rocket_drv.c | 42 ++++- drivers/accel/rocket/rocket_drv.h | 2 + drivers/accel/rocket/rocket_job.c | 157 +++++++++++++++--- drivers/pmdomain/rockchip/pm-domains.c | 89 +++++++--- 12 files changed, 467 insertions(+), 64 deletions(-) base-commit: 1a1de54f7369cd2b5bac0f265910e60ad3a6b4c3 -- 2.43.0