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[34.34.4.154]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6aab37ead71sm3464110a12.3.2026.09.24.03.43.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Sep 2026 03:43:33 -0700 (PDT) From: Grzegorz Jaszczyk To: tglx@kernel.org Cc: linux-kernel@vger.kernel.org, dmaluka@chromium.org, vineethrp@chromium.org, chuanxiao.dong@intel.com, jaszczyk@google.com, Grzegorz Jaszczyk , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , "Peter Zijlstra (Intel)" , Juergen Gross , Radu Rendec , Thierry Reding , Julian Stecklina , Sean Christopherson , "Naveen N Rao (AMD)" , Ard Biesheuvel , "Mike Rapoport (Microsoft)" , Andrew Morton , Arnd Bergmann , Thomas Zimmermann , Thorsten Blum , Breno Leitao , Harshit Mogalapalli Subject: [PATCH v2 2/4] x86/apic: Consolidate early APIC initialization into apic_early_init() Date: Thu, 24 Sep 2026 10:40:19 +0000 Message-ID: <20260924104102.3534474-3-jaszczyk@chromium.org> X-Mailer: git-send-email 2.56.0.rc1.315.gc6ed9934b7-goog In-Reply-To: <20260924104102.3534474-1-jaszczyk@chromium.org> References: <20260924104102.3534474-1-jaszczyk@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Early APIC initialization is currently scattered across setup_arch(): apic_setup_apic_calls() and acpi_mps_check() run early, check_x2apic() is invoked much later during memory range setup, and apic_finalize_early_init() runs near the end of setup_arch(). Consolidate the initial setup into apic_early_init() in arch/x86/kernel/apic/apic.c so that acpi_mps_check(), check_x2apic(), and static call initialization happen together in one place. Make check_x2apic() static as it no longer has external callers. Place apic_setup_apic_calls() at the end of apic_early_init() in preparation for replacing it with apic_install_default_driver() in the subsequent patch. This ordering change is safe because neither acpi_mps_check() nor check_x2apic() uses APIC static calls (check_x2apic() accesses x2APIC MSRs directly via native_apic_msr_read()). Suggested-by: Thomas Gleixner Signed-off-by: Grzegorz Jaszczyk --- arch/x86/include/asm/apic.h | 3 ++- arch/x86/kernel/apic/apic.c | 16 ++++++++++++++-- arch/x86/kernel/setup.c | 10 +--------- 3 files changed, 17 insertions(+), 12 deletions(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index b4c112b6d3ab3..b1610b8bc6544 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -133,6 +133,7 @@ extern void sync_Arb_IDs(void); extern void init_bsp_APIC(void); extern void apic_intr_mode_select(void); extern void apic_intr_mode_init(void); +void apic_early_init(void); void apic_finalize_early_init(void); void register_lapic_address(unsigned long address); extern void setup_boot_APIC_clock(void); @@ -183,6 +184,7 @@ extern void topology_reset_possible_cpus_up(void); #else /* !CONFIG_X86_LOCAL_APIC */ static inline void lapic_shutdown(void) { } #define local_apic_timer_c2_ok 1 +static inline void apic_early_init(void) { } static inline void apic_finalize_early_init(void) { } static inline void disable_local_APIC(void) { } # define setup_boot_APIC_clock x86_init_noop @@ -254,7 +256,6 @@ static inline u32 native_apic_msr_read(u32 reg) { BUG(); } #define x2apic_mode (0) #define x2apic_supported() (0) #endif /* !CONFIG_X86_X2APIC */ -extern void __init check_x2apic(void); struct irq_data; diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index cb78e0d6c9317..721e194ceac2d 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1869,7 +1869,7 @@ static __init void try_to_enable_x2apic(int remap_mode) x2apic_enable(); } -void __init check_x2apic(void) +static void __init check_x2apic(void) { if (x2apic_enabled()) { pr_info("x2apic: enabled by BIOS, switching to x2apic ops\n"); @@ -1884,7 +1884,7 @@ void __init check_x2apic(void) } } #else /* CONFIG_X86_X2APIC */ -void __init check_x2apic(void) +static void __init check_x2apic(void) { if (!apic_is_x2apic_enabled()) return; @@ -2064,6 +2064,18 @@ static bool __init detect_init_APIC(void) } #endif +void __init apic_early_init(void) +{ + if (acpi_mps_check()) { + apic_is_disabled = true; + setup_clear_cpu_cap(X86_FEATURE_APIC); + } else { + check_x2apic(); + } + + apic_setup_apic_calls(); +} + void __init apic_finalize_early_init(void) { if (apic_validate_deadline_timer()) diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 06522a205dd93..2bab41e073d52 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c @@ -993,14 +993,7 @@ void __init setup_arch(char **cmdline_p) x86_report_nx(); - apic_setup_apic_calls(); - - if (acpi_mps_check()) { -#ifdef CONFIG_X86_LOCAL_APIC - apic_is_disabled = true; -#endif - setup_clear_cpu_cap(X86_FEATURE_APIC); - } + apic_early_init(); e820__finish_early_params(); @@ -1062,7 +1055,6 @@ void __init setup_arch(char **cmdline_p) /* max_low_pfn get updated here */ find_low_pfn_range(); #else - check_x2apic(); /* How many end-of-memory variables you have, grandma! */ /* need this before calling reserve_initrd */ -- 2.56.0.rc1.315.gc6ed9934b7-goog