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[123.202.92.53]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0974ec5dfsm4399478a91.3.2026.09.24.04.12.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Sep 2026 04:12:58 -0700 (PDT) From: Jun Yan To: damon.ding@rock-chips.com Cc: Laurent.pinchart@ideasonboard.com, airlied@gmail.com, andrzej.hajda@intel.com, dri-devel@lists.freedesktop.org, heiko@sntech.de, jernej.skrabec@gmail.com, jerrysteve1101@gmail.com, jonas@kwiboo.se, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, luca.ceresoli@bootlin.com, maarten.lankhorst@linux.intel.com, mripard@kernel.org, neil.armstrong@linaro.org, rfoss@kernel.org, simona@ffwll.ch, tzimmermann@suse.de Subject: Re: [PATCH RSEND] drm/bridge: analogix_dp: use devm_phy_optional_get() for the DP PHY Date: Thu, 24 Sep 2026 19:12:49 +0800 Message-ID: <20260924111251.936444-1-jerrysteve1101@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit > On 9/24/2026 11:24 AM, Damon Ding wrote: > > Hi Jun, > > > > On 9/24/2026 10:04 AM, Jun Yan wrote: > >> The DP PHY is optional: the Rockchip RK3399 eDP controller (used as the > >> internal eDP port) has no separate PHY device and relies on its built-in > >> PHY, which is programmed directly through the GRF registers, so its DT > >> node carries no "phys"/"phy-names" property. > >> > >> Requesting the PHY with devm_phy_get() therefore returns -ENODEV (or > >> -ENOSYS when CONFIG_GENERIC_PHY is disabled) and the driver logs a > >> misleading "no DP phy configured" error at probe time before falling back > >> to a NULL phy. > >> > >> Use devm_phy_optional_get() instead, which returns NULL when the PHY is > >> absent and otherwise behaves identically, and drop the manual -ENODEV/ > >> -ENOSYS handling. This also removes the spurious error message. > >> > >> Assisted-by: Claude:deepseek-v4-flash > >> Signed-off-by: Jun Yan > >> --- > >>   .../gpu/drm/bridge/analogix/analogix_dp_core.c | 18 +++--------------- > >>   1 file changed, 3 insertions(+), 15 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c b/ > >> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > >> index 18e76d1e78e1..28eb668d3e3f 100644 > >> --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > >> +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c > >> @@ -1427,21 +1427,9 @@ analogix_dp_probe(struct device *dev, struct > >> analogix_dp_plat_data *plat_data) > >>       if (ret) > >>           return ERR_PTR(ret); > >> -    dp->phy = devm_phy_get(dp->dev, "dp"); > >> -    if (IS_ERR(dp->phy)) { > >> -        dev_err(dp->dev, "no DP phy configured\n"); > >> -        ret = PTR_ERR(dp->phy); > >> -        if (ret) { > >> -            /* > >> -             * phy itself is not enabled, so we can move forward > >> -             * assigning NULL to phy pointer. > >> -             */ > >> -            if (ret == -ENOSYS || ret == -ENODEV) > >> -                dp->phy = NULL; > >> -            else > >> -                return ERR_PTR(ret); > >> -        } > >> -    } > > > > It should be better to add some comments here: > > > > /* > >  * Exynos5/RK3288/RK3399 use Analogix DP controller built-in PHY, > >  * no separate PHY configuration is needed. > >  */ > > Well, I think it should be fixed to: > > /* > * RK3288/RK3399 use Analogix DP controller built-in PHY, > * no extra PHY configuration is required. > */ > > The Exynos5xxx case may be more complex. > Thanks for the review. I will add the comments in the patch and send v2 soon. > > > >> +    dp->phy = devm_phy_optional_get(dp->dev, "dp"); > >> +    if (IS_ERR(dp->phy)) > >> +        return ERR_CAST(dp->phy); > >>       dp->clock = devm_clk_get(&pdev->dev, "dp"); > >>       if (IS_ERR(dp->clock)) { > > > > With the comment added: > > Reviewed-by: Damon Ding > > > > Best regards, > > Damon > >