[PATCH] drm/i915/dp: Configure protocol converter only for TMDS outputs

[Conor Svensson <conor10@gmail.com>]

intel_dp_configure_protocol_converter() currently writes the HDMI/DVI
output-selection control for every DP 1.3+ branch. The write is only
meaningful for a TMDS downstream output; a native DisplayPort output should
not be switched to the HDMI/DVI protocol-converter mode.

An Anker 565 branch (Synaptics OUI 90:cc:24) changes its downstream port
descriptor from DisplayPort to DVI immediately after this write. i915 then
derives a 165 MHz TMDS limit on the next hotplug probe and drops the
monitor's native modes. Skipping the write for non-TMDS outputs prevents
the transition.

The existing dfp.min_tmds_clock classification is nonzero for HDMI/DVI
outputs and zero for native DisplayPort outputs, so retain the write for
the protocol-converter cases that need it. Colour-conversion controls are
unchanged.

Tested on a ThinkPad L14 Gen 4 with an Anker 565 A8388 hub and a Dell
S3422DWG:

- native 3440x1440@59.973 after DP recovery
- three USB-C reconnects on the first USB-C port
- one test on the second USB-C port
- suspend/resume on the second port
- HDMI through the hub at 3440x1440@59.973, with HDMI-specific modes
  present

On the unpatched control kernel, the live descriptor changed from
08 f0 01 1e 00 00 00 00 to 0a 42 00 00 00 00 00 00 across the 0x3050 write.

Link: https://gitlab.freedesktop.org/drm/i915/kernel/-/work_items/17180

Root-cause findings and validation details were added to the linked issue.

Assisted-by: LLM Codex GPT-6

Signed-off-by: Conor Svensson <conor10@gmail.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ffddf4b33..cdc3d7786 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4422,14 +4422,17 @@ void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
 	if (!drm_dp_is_branch(intel_dp->dpcd))
 		return;
 
-	tmp = intel_dp_has_hdmi_sink(intel_dp) ? DP_HDMI_DVI_OUTPUT_CONFIG : 0;
+	/* HDMI/DVI output selection only applies to TMDS downstream ports. */
+	if (intel_dp->dfp.min_tmds_clock) {
+		tmp = intel_dp_has_hdmi_sink(intel_dp) ? DP_HDMI_DVI_OUTPUT_CONFIG : 0;
 
-	ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
-				     DP_PROTOCOL_CONVERTER_CONTROL_0, tmp);
-	if (ret < 0)
-		drm_dbg_kms(display->drm,
-			    "Failed to %s protocol converter HDMI mode\n",
-			    str_enable_disable(intel_dp_has_hdmi_sink(intel_dp)));
+		ret = drm_dp_dpcd_write_byte(&intel_dp->aux,
+					     DP_PROTOCOL_CONVERTER_CONTROL_0, tmp);
+		if (ret < 0)
+			drm_dbg_kms(display->drm,
+				    "Failed to %s protocol converter HDMI mode\n",
+				    str_enable_disable(intel_dp_has_hdmi_sink(intel_dp)));
+	}
 
 	if (crtc_state->sink_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
 		switch (crtc_state->output_format) {

base-commit: 703cd271db3a35088460ab3fec0a96bd48e7fe04
-- 
2.55.0