From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from sender5-op-o11.zoho.com (sender5-op-o11.zoho.com [165.173.182.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74B7041D131 for ; Fri, 25 Sep 2026 18:46:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=165.173.182.11 ARC-Seal:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790362015; cv=pass; b=KkrcG9vuxMeRpmzNTjutkusBKia1Lels7Zd4KVoeWFQdk7LRFpAqq2bozSQQS7eMI4OTXoeVuyAviXtTnBB0BMkuhD5Q45zce37xbFXqb+ishJ5bhWFHcKVNx96gi1hy6sjQIISsluK0XoW2CZsQ3r7AXEmQD3AsvUHOXRDj4NA= ARC-Message-Signature:i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790362015; c=relaxed/simple; bh=5DAEbzlOq2BwNKWtEj0p8a3G//bik3T3OU4VkG5Ly2s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FHlqiSMLi2oJNLL7cdmo3vFrxhMEtW//p4b5NS1JSo0N+0LGZNBVxEnlu94fRlbF1179sdGzp9RNm9XOo+rew6uasW/dNwe8kF29RdmVR0l9s7bmFzk33Jfl7v3GKET05IAGwiLbK3DUTOqbPL7CLKtkH/XhpUIt/PEe9fdQ6SQ= ARC-Authentication-Results:i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b=Dkfm7/ye; arc=pass smtp.client-ip=165.173.182.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=adrian.larumbe@collabora.com header.b="Dkfm7/ye" ARC-Seal: i=1; a=rsa-sha256; t=1790361988; cv=none; d=zohomail.com; s=zohoarc; b=TWpg/8V+wLzPJg5gsmIl/txef1P0WpSvYypxW7oAYgXJeOHGhUxZk4RFyW5cfnzMFS+ZFK33vH0fBeC1hxkHRRFpg4ghX5n8TotHpi+9dGHNsXeTTh3cdENw/i9qvnx5StEArvClxe+UFrFACREbNDh9Ftr6jL8PoUKHjE2NAjQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1790361988; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:Subject:Subject:To:To:Message-Id:Reply-To; bh=ncPApYC3d9xb55sEOgoNixWFBqr/djU528Bcm4xd5Ww=; b=FCuahLI8S8P4B2gGb7uNmZcI4q8hx3YAHK6v4ZDG67Q60mZLuRXX3qBqvlJd7SbQmXSd6CjUCimLqK9L4xH++zQ0TH+ZuEeZeI7YL85BAfr5Lvs5sIiOkGAHUsz0PrgBtb+0GxVj/NTz2IzEKxdocgC+3LP9k40XYTI4S/mW2Xo= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=adrian.larumbe@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1790361988; s=zohomail; d=collabora.com; i=adrian.larumbe@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=ncPApYC3d9xb55sEOgoNixWFBqr/djU528Bcm4xd5Ww=; b=Dkfm7/yeQANURdk8hyHpRfeylitTHkcNcFJAXbygbXVIv8V6zqBrB0enYBGwyayi JVdstKX8Q7LLHy2SvMLIgfleOHCRMbqeckWmSVN9uaWF2VOCtHPQrDkUfC/NS0fQa6K BZOBjQPGSjbxHN7Wz2YHC8KJd2tvJtWJkTTjRRKo= Received: by smtp.zohomail.com with SMTPS id 1790361987635375.41698127528184; Fri, 25 Sep 2026 11:46:27 -0700 (PDT) From: =?utf-8?q?Adri=C3=A1n_Larumbe?= Date: Fri, 25 Sep 2026 19:45:31 +0100 Subject: [PATCH v11 10/15] drm/panfrost: Add debugfs knob for manually triggering a GPU reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20260925-claude-fixes-v11-10-0dbf5a58e7ce@collabora.com> References: <20260925-claude-fixes-v11-0-0dbf5a58e7ce@collabora.com> In-Reply-To: <20260925-claude-fixes-v11-0-0dbf5a58e7ce@collabora.com> To: Boris Brezillon , Rob Herring , Steven Price , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Faith Ekstrand , "Marty E. Plummer" , Tomeu Vizoso , Eric Anholt , Alyssa Rosenzweig , Robin Murphy , Philipp Zabel Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Collabora Kernel Team , =?utf-8?q?Adri=C3=A1n_Larumbe?= , Neil Armstrong X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2966; i=adrian.larumbe@collabora.com; h=from:subject:message-id; bh=5DAEbzlOq2BwNKWtEj0p8a3G//bik3T3OU4VkG5Ly2s=; b=owEB7QES/pANAwAKAQ4mfkzuU0M9AcsmYgBqtsFEyWLIc39eqvLHd70G3fhUZ2tmPRJUWLgsi hXqoS8uufaJAbMEAAEKAB0WIQQyQDDowAUXXfk3B6QOJn5M7lNDPQUCarbBRAAKCRAOJn5M7lND PRKnDACvE7OdxG84S6JuOmcQz96Ml/GHnF3XKcTkjm7sSOtrD3YpvQucGw5C9Xz641i0hsFDoGk T6Bz0JRgOiFf1KAbGhf+6BhptmEbx3fB1Ym+FhpLaNpjCChNQCkImCaItt5Tx5pQB9jd84sf00e I8EkNeFf6ze3xAjH2xQtSDucUKSBXtZBmTkTFaUfjRyaaF5q7scWPOE/Q5Sd3Y2bW6zZEcXIunR 1bA36cCja3t1UGVhmbCvhukQeERxi3V1ytxX1AeLR0mk52fypwl35UnZGqRep8I5F1x0IYxjYh5 h8u18BQKDUdnL57gdf8OpjSagrG1c4Kmp5N2m3ByVRc3YwwzFScXfYp1+hwL3p9N6RNIm2daP46 5TLpvGTjoOXR4T70NlkPX3enjxt+yaYNLphP+qEHWh8OusAV/PszT6NvdMhZnZwkXFqn6Dynsis Z2Fm6AFIUyog70MIHX0q3oyPkUAV7XrpkJHUOJlfJNyoXhMmjC8j+k1tLMkuKtfHTED88= X-Developer-Key: i=adrian.larumbe@collabora.com; a=openpgp; fpr=324030E8C005175DF93707A40E267E4CEE53433D This will be of great help when testing potential races between the GPU reset sequence and other parts of the code accessing HW registers. We must also disable the reset work item rather than simply cancelling it, to prevent the knob from triggering another reset when the device is being removed. Reviewed-by: Boris Brezillon Signed-off-by: Adrián Larumbe --- drivers/gpu/drm/panfrost/panfrost_device.c | 42 ++++++++++++++++++++++++++++++ drivers/gpu/drm/panfrost/panfrost_job.c | 2 +- 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c index 967cabd18a72..3cc9540f8f33 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -2,6 +2,7 @@ /* Copyright 2018 Marty E. Plummer */ /* Copyright 2019 Linaro, Ltd, Rob Herring */ +#include #include #include #include @@ -592,9 +593,50 @@ EXPORT_GPL_DEV_PM_OPS(panfrost_pm_ops) = { }; #ifdef CONFIG_DEBUG_FS +static int reset_get(void *data, u64 *val) +{ + struct panfrost_device *pfdev = + container_of(data, struct panfrost_device, base); + + *val = atomic_read(&pfdev->reset.pending); + return 0; +} + +static int reset_set(void *data, u64 val) +{ + struct panfrost_device *pfdev = + container_of(data, struct panfrost_device, base); + int ret = pm_runtime_get_if_active(pfdev->base.dev); + + if (!ret) + return 0; + + panfrost_device_schedule_reset(pfdev); + flush_work(&pfdev->reset.work); + + /* ret < 0 means runtime PM for the device is disabled, so we + * only need to return the PM reference in the opposite case + */ + if (ret > 0) + pm_runtime_put(pfdev->base.dev); + + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(panfrost_reset_debugfs_fops, + reset_get, reset_set, + "0x%08llx\n"); + +static void panfrost_reset_debugfs_init(struct drm_minor *minor) +{ + debugfs_create_file("reset", 0600, minor->debugfs_root, + minor->dev, &panfrost_reset_debugfs_fops); +} + void panfrost_device_debugfs_init(struct drm_minor *minor) { panfrost_gem_debugfs_init(minor); panfrost_sched_debugfs_init(minor); + panfrost_reset_debugfs_init(minor); } #endif // CONFIG_DEBUG_FS diff --git a/drivers/gpu/drm/panfrost/panfrost_job.c b/drivers/gpu/drm/panfrost/panfrost_job.c index 00fb36c577df..ab65786bf63b 100644 --- a/drivers/gpu/drm/panfrost/panfrost_job.c +++ b/drivers/gpu/drm/panfrost/panfrost_job.c @@ -932,7 +932,7 @@ void panfrost_jm_fini(struct panfrost_device *pfdev) drm_sched_fini(&js->queue[j].sched); } - cancel_work_sync(&pfdev->reset.work); + disable_work_sync(&pfdev->reset.work); destroy_workqueue(pfdev->reset.wq); } -- 2.55.0