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[84.3.243.148]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-4887a30b1dfsm9467234f8f.4.2026.09.25.12.06.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Sep 2026 12:06:31 -0700 (PDT) From: Gabor Juhos Date: Fri, 25 Sep 2026 21:06:14 +0200 Subject: [PATCH v2 5/8] mtd: rawnand: qcom: make nandc_set_read_loc_first() more generic Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260925-qcom_nandc-share-more-code-v2-5-a1b088052d6a@gmail.com> References: <20260925-qcom_nandc-share-more-code-v2-0-a1b088052d6a@gmail.com> In-Reply-To: <20260925-qcom_nandc-share-more-code-v2-0-a1b088052d6a@gmail.com> To: Manivannan Sadhasivam , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: Md Sadre Alam , linux-mtd@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Gabor Juhos X-Mailer: b4 0.14.3 The function gets a 'nand_chip' pointer as a parameter but it is only used to extract a pointer to the nand controller's private structure from that. In order to make the function more generic, change the declaration to get a 'qcom_nandc_controller' pointer directly, and update the callers accordingly. While at it, also change the function name to use a 'qcom_nandc' prefix. No functional changes intended. This is in preparation of moving the function into the 'qpic_common' code to allow reusing it from the 'spi-qpic-snand' driver. Signed-off-by: Gabor Juhos --- Changes in v2: - Replace 'qpic_nandc' to 'qcom_nandc' in the commit message to match the actual code (spotted by sashiko-bot) --- drivers/mtd/nand/raw/qcom_nandc.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c index 99fbf5458083..96a1a5a03de8 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -150,8 +150,8 @@ static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw) } /** - * nandc_set_read_loc_first() - to set read location first register - * @chip: NAND Private Flash Chip Data + * qcom_nandc_set_read_loc_first() - to set read location first register + * @nandc: NAND controller's private data * @reg_base: location register base * @cw_offset: code word offset * @read_size: code word read length @@ -159,11 +159,10 @@ static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw) * * This function will set location register value */ -static void nandc_set_read_loc_first(struct nand_chip *chip, - int reg_base, u32 cw_offset, - u32 read_size, u32 is_last_read_loc) +static void qcom_nandc_set_read_loc_first(struct qcom_nand_controller *nandc, + int reg_base, u32 cw_offset, + u32 read_size, u32 is_last_read_loc) { - struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); __le32 locreg_val; u32 val = FIELD_PREP(READ_LOCATION_OFFSET_MASK, cw_offset) | FIELD_PREP(READ_LOCATION_SIZE_MASK, read_size) | @@ -230,8 +229,9 @@ static void nandc_set_read_loc(struct nand_chip *chip, int cw, int reg, return nandc_set_read_loc_last(chip, reg_base, cw_offset, read_size, is_last_read_loc); else - return nandc_set_read_loc_first(chip, reg_base, cw_offset, - read_size, is_last_read_loc); + return qcom_nandc_set_read_loc_first(nandc, reg_base, cw_offset, + read_size, + is_last_read_loc); } /* helper to configure address register values */ @@ -1918,7 +1918,7 @@ static int qcom_param_page_type_exec(struct nand_chip *chip, const struct nand_ if (nandc->props->qpic_version2) nandc_set_read_loc_last(chip, reg_base, 0, len, 1); else - nandc_set_read_loc_first(chip, reg_base, 0, len, 1); + qcom_nandc_set_read_loc_first(nandc, reg_base, 0, len, 1); if (!nandc->props->has_onfi_read_op) { qcom_write_reg_dma(nandc, &nandc->regs->vld, NAND_DEV_CMD_VLD, 1, 0); -- 2.55.0