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Sat, 26 Sep 2026 18:17:38 -0700 (PDT) From: Leonardo Martins Martins Subject: [PATCH 0/4] staging: rtl8723bs: refactor PHY_ConvertTxPowerLimitToPowerIndex() Date: Sat, 26 Sep 2026 22:12:23 -0300 Message-Id: <20260926-rtl8723bs-tx-pwr-limit-v1-0-989dcbc113fd@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAHdtuGoC/x3MTQqEMAxA4atI1gbaCKPxKuLCOlED/pGWGUG8+ 5RZfov3bohiKhHa4gaTj0Y99gxfFjAuwz4L6jsbyNHLMRFaWpuaqhAxXXh+DVfdNCEPnkPgiZ0 XyPFpMun1H3f98/wA7wwFz2gAAAA= X-Change-ID: 20260922-rtl8723bs-tx-pwr-limit-9a19bb9f901e To: Greg Kroah-Hartman Cc: linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, Leonardo Martins Martins X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790471854; l=1530; i=dev.lmmrtns@gmail.com; s=20260813; h=from:subject:message-id; bh=ePnRvq3UMM+sa2D8dc9jnBVFW8hpD++8XhlbdDDl/iI=; b=Jks1UthAo6nYxCSO90vZ/xP1AGslNfQhYyvU2ijEGDp9kIDJXEydZf3QI+/KSukdZMwZ/gIce AAWx3Jo0pGjD+A+My/G0eWKFkYr7vZ4//EOTxclpNQlmUcFOlALKXqf X-Developer-Key: i=dev.lmmrtns@gmail.com; a=ed25519; pk=dOFSCpUL7hbyVftAaUGDebsgsSl9Uk/Tx0Aqpd4Bcng= The function PHY_ConvertTxPowerLimitToPowerIndex() has several style problems, such as mixed-case names, deeply nested code, and redundant bounds checking. Patches 1 and 2 rename mixed-case names that are on the same scope as this function, struct fields such as TxPwrLimit_2_4G were left as is. Patch 3 removes redundant parts of the code, and patch 4 solves the nesting issue by extracting the inner loop into an auxiliary function like it is done in rtw_phy_tx_power_limit_config(), at drivers/net/wireless/realtek/rtw88/phy.c Checkpatch issues a few warnings and checks for deep nesting and long lines, but these are solved by the last patch. Compile tested only. Signed-off-by: Leonardo Martins Martins --- Leonardo Martins Martins (4): staging: rtl8723bs: rename PHY_ConvertTxPowerLimitToPowerIndex() staging: rtl8723bs: rename local vars in phy_tx_power_limit_to_index() staging: rtl8723bs: access TxPowerByRateBase2_4G directly staging: rtl8723bs: extract inner loop in phy_tx_power_limit_to_index() drivers/staging/rtl8723bs/hal/hal_com_phycfg.c | 88 ++++++++-------------- drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c | 2 +- drivers/staging/rtl8723bs/include/hal_com_phycfg.h | 5 +- 3 files changed, 32 insertions(+), 63 deletions(-) --- base-commit: 8444548bd905f22093729065408284a6b46f7eee change-id: 20260922-rtl8723bs-tx-pwr-limit-9a19bb9f901e Best regards, -- Leonardo Martins Martins