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Sat, 26 Sep 2026 18:17:55 -0700 (PDT) From: Leonardo Martins Martins Date: Sat, 26 Sep 2026 22:12:27 -0300 Subject: [PATCH 4/4] staging: rtl8723bs: extract inner loop in phy_tx_power_limit_to_index() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260926-rtl8723bs-tx-pwr-limit-v1-4-989dcbc113fd@gmail.com> References: <20260926-rtl8723bs-tx-pwr-limit-v1-0-989dcbc113fd@gmail.com> In-Reply-To: <20260926-rtl8723bs-tx-pwr-limit-v1-0-989dcbc113fd@gmail.com> To: Greg Kroah-Hartman Cc: linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, Leonardo Martins Martins X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790471854; l=2758; i=dev.lmmrtns@gmail.com; s=20260813; h=from:subject:message-id; bh=j4MY2CMuvs7m5BNgdWLNKr7Heqr8s743RA0gDwzd388=; b=Hg5K+V4QmTVouBv8J5ouqlK4RRVp3Fz0i1kZ+QlfSZkqpGbV0SDNlvdvBxWzwNd/qE2hmTiy0 Ohl4f6CSLMgC0luTnAxhXzDxti8q0WEPCRc68SNFmWHDEO+/tZ1kQl8 X-Developer-Key: i=dev.lmmrtns@gmail.com; a=ed25519; pk=dOFSCpUL7hbyVftAaUGDebsgsSl9Uk/Tx0Aqpd4Bcng= phy_tx_power_limit_to_index() iterates over an array with 5 indexes, making the code deeply nested, move the inner loop into an auxiliary static function to reduce nesting and improve readability. Signed-off-by: Leonardo Martins Martins --- drivers/staging/rtl8723bs/hal/hal_com_phycfg.c | 47 ++++++++++++++------------ 1 file changed, 25 insertions(+), 22 deletions(-) diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c index 46402ab07d757b2aba69d6fb7fec127681c9d012..8e39419b95f445f0eb153efcd28dd97fafeb8e03 100644 --- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c +++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c @@ -713,35 +713,38 @@ s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 reg_pwr_tbl_sel, return pwr_lmt; } +static void __phy_tx_power_limit_to_index(struct hal_com_data *hal_data, struct registry_priv *r, + u8 reg, u8 bw, u8 ch, u8 rs) +{ + s8 tmp_pwr_lmt = hal_data->TxPwrLimit_2_4G[reg][bw][rs][ch][RF_PATH_A]; + s8 tmp; + u8 path; + u8 pwr_base; + + for (path = RF_PATH_A; path < MAX_RF_PATH_NUM; ++path) { + if (hal_data->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE) + pwr_base = hal_data->TxPwrByRateBase2_4G[path][rs]; + else + pwr_base = r->reg_power_base * 2; + + if (tmp_pwr_lmt != MAX_POWER_INDEX) { + tmp = tmp_pwr_lmt - pwr_base; + hal_data->TxPwrLimit_2_4G[reg][bw][rs][ch][path] = tmp; + } + } +} + void phy_tx_power_limit_to_index(struct adapter *adapter) { struct hal_com_data *hal_data = GET_HAL_DATA(adapter); struct registry_priv *r = &adapter->registrypriv; - u8 pwr_base = 0x2E; u8 reg, bw, ch, rs; - s8 tmp = 0, tmp_pwr_lmt = 0; - u8 path = 0; for (reg = 0; reg < MAX_REGULATION_NUM; ++reg) { - for (bw = 0; bw < MAX_2_4G_BANDWIDTH_NUM; ++bw) { - for (ch = 0; ch < CHANNEL_MAX_NUMBER_2G; ++ch) { - for (rs = 0; rs < MAX_RATE_SECTION_NUM; ++rs) { - tmp_pwr_lmt = hal_data->TxPwrLimit_2_4G[reg][bw][rs][ch][RF_PATH_A]; - - for (path = RF_PATH_A; path < MAX_RF_PATH_NUM; ++path) { - if (hal_data->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE) - pwr_base = hal_data->TxPwrByRateBase2_4G[path][rs]; - else - pwr_base = r->reg_power_base * 2; - - if (tmp_pwr_lmt != MAX_POWER_INDEX) { - tmp = tmp_pwr_lmt - pwr_base; - hal_data->TxPwrLimit_2_4G[reg][bw][rs][ch][path] = tmp; - } - } - } - } - } + for (bw = 0; bw < MAX_2_4G_BANDWIDTH_NUM; ++bw) + for (ch = 0; ch < CHANNEL_MAX_NUMBER_2G; ++ch) + for (rs = 0; rs < MAX_RATE_SECTION_NUM; ++rs) + __phy_tx_power_limit_to_index(hal_data, r, reg, bw, ch, rs); } } -- 2.47.3