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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Received: from satlexmb08.amd.com (165.204.84.17) by BN5PEPF00046989.mail.protection.outlook.com (10.167.245.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.8 via Frontend Transport; Sat, 26 Sep 2026 01:35:34 +0000 Received: from satlexmb07.amd.com (10.181.42.216) by satlexmb08.amd.com (10.181.42.217) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49; Fri, 25 Sep 2026 20:35:33 -0500 Received: from xsjdavidzha51.xilinx.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server id 15.2.2562.49 via Frontend Transport; Fri, 25 Sep 2026 20:35:32 -0500 From: David Zhang To: , , , , , , CC: David Zhang , , Subject: [PATCH V0 19/21] accel/amdxdna: Link SR-IOV VFs for power management sequencing Date: Fri, 25 Sep 2026 18:34:46 -0700 Message-ID: <20260926013448.3840921-20-yidong.zhang@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260926013448.3840921-1-yidong.zhang@amd.com> References: <20260926013448.3840921-1-yidong.zhang@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN5PEPF00046989:EE_|SN7PR12MB6863:EE_ X-MS-Office365-Filtering-Correlation-Id: 93275815-1965-4d57-33d4-08df1b6e75bb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|23010399003|36860700016|376014|82310400026|6133799003|18002099003|10067099003|11063799006|56012099006|4143699003|22082099003; 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This ensures the PM core enforces the proper power management sequence: suspending VFs before the PF, and resuming the PF before VFs. If linking fails, roll back SR-IOV initialization. Also add a comment clarifying that pci_disable_sriov() removes VF drivers before firmware VF contexts are destroyed. Signed-off-by: David Zhang --- drivers/accel/amdxdna/aie4_sriov.c | 74 ++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/drivers/accel/amdxdna/aie4_sriov.c b/drivers/accel/amdxdna/aie4_sriov.c index 0eea28f62676..bfea6ff00ec0 100644 --- a/drivers/accel/amdxdna/aie4_sriov.c +++ b/drivers/accel/amdxdna/aie4_sriov.c @@ -56,9 +56,75 @@ int aie4_sriov_stop(struct amdxdna_dev_hdl *ndev) pci_disable_sriov(pdev); ndev->num_vfs = 0; + + /* + * pci_disable_sriov() removes VF drivers first; call destroy_vfs after + * so firmware VF contexts are not cleared before VF drivers finish cleanup. + */ return aie4_destroy_vfs(ndev); } +static int aie4_for_each_vfs(struct amdxdna_dev *xdna, + int (*cb)(struct amdxdna_dev *, struct pci_dev *)) +{ + struct pci_dev *pdev_pf = to_pci_dev(xdna->ddev.dev); + struct pci_dev *pdev_vf; + int pos, ret; + u16 vf_did; + + pos = pci_find_ext_capability(pdev_pf, PCI_EXT_CAP_ID_SRIOV); + if (!pos) + return 0; + ret = pci_read_config_word(pdev_pf, pos + PCI_SRIOV_VF_DID, &vf_did); + if (ret) { + XDNA_ERR(xdna, "read VF Device ID failed %d", ret); + return -ENODEV; + } + + for (pdev_vf = pci_get_device(pdev_pf->vendor, vf_did, NULL); + pdev_vf; + pdev_vf = pci_get_device(pdev_pf->vendor, vf_did, pdev_vf)) { + if (!pdev_vf->is_virtfn || pdev_vf->physfn != pdev_pf) + continue; + + ret = cb(xdna, pdev_vf); + if (ret) { + /* + * On early return the next iteration never runs, so + * release the current device's ref manually. + * On normal loop exit pci_get_device() returning NULL + * already releases the last device's ref internally. + */ + pci_dev_put(pdev_vf); + return ret; + } + } + + return 0; +} + +static int aie4_link_vf(struct amdxdna_dev *xdna, struct pci_dev *pdev_vf) +{ + struct pci_dev *pdev_pf = to_pci_dev(xdna->ddev.dev); + struct device_link *link; + + link = device_link_add(&pdev_vf->dev, /* consumer = VF */ + &pdev_pf->dev, /* supplier = PF */ + DL_FLAG_PM_RUNTIME | DL_FLAG_AUTOREMOVE_CONSUMER); + if (!link) { + XDNA_ERR(xdna, "Failed to link VF %s", pci_name(pdev_vf)); + return -EINVAL; + } + + XDNA_DBG(xdna, "Linked VF %s", pci_name(pdev_vf)); + return 0; +} + +static int aie4_link_vfs(struct amdxdna_dev *xdna) +{ + return aie4_for_each_vfs(xdna, aie4_link_vf); +} + static int aie4_sriov_start(struct amdxdna_dev_hdl *ndev, int num_vfs) { struct amdxdna_dev *xdna = ndev->aie.xdna; @@ -76,6 +142,14 @@ static int aie4_sriov_start(struct amdxdna_dev_hdl *ndev, int num_vfs) return ret; } + ret = aie4_link_vfs(xdna); + if (ret) { + XDNA_ERR(xdna, "link VFs failed, ret: %d", ret); + pci_disable_sriov(pdev); + aie4_destroy_vfs(ndev); + return ret; + } + ndev->num_vfs = num_vfs; return num_vfs; } -- 2.34.1