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Fri, 25 Sep 2026 18:48:05 -0700 (PDT) Received: from ryzen.lan ([2601:644:8000:7a86::e35]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87fea18ff85sm1836463b3a.19.2026.09.25.18.48.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Sep 2026 18:48:04 -0700 (PDT) From: Rosen Penev To: devicetree@vger.kernel.org Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-mtd@lists.infradead.org (open list:MEMORY TECHNOLOGY DEVICES (MTD)), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v4] dt-bindings: mtd: convert IBM NDFC binding to YAML Date: Fri, 25 Sep 2026 18:48:02 -0700 Message-ID: <20260926014802.87255-1-rosenp@gmail.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The NDFC NAND flash controller was only described in a legacy text file, so dtbs_check reported "failed to match any schema with compatible: ['ibm,ndfc']" for the ndfc nodes of the bluestone, canyonlands, eiger, glacier, sequoia and warp device trees. Convert the binding to the YAML format so those nodes match the generic nand-controller-legacy schema. Describe the node's reg, ccr and bank-settings properties, along with its "nand" chip node which carries the legacy partition layout. The "nand" chip node carries no unit address, so the "nand@[a-f0-9]" pattern of nand-controller-legacy.yaml never matches it and raw-nand-chip.yaml is never applied. Describe it with mtd.yaml, nand-property.yaml and raw-nand-property.yaml instead, the way the controller level does, so that both the deprecated partition@ nodes and a modern "partitions" subnode are accepted. The node name does not matter, the driver picks the first child of the controller node. Assisted-by: LLM Signed-off-by: Rosen Penev --- v4: allow modern partitions v3: fix wrong regex v2: fix reg value .../devicetree/bindings/mtd/ibm,ndfc.txt | 39 ------ .../devicetree/bindings/mtd/ibm,ndfc.yaml | 128 ++++++++++++++++++ 2 files changed, 128 insertions(+), 39 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mtd/ibm,ndfc.txt create mode 100644 Documentation/devicetree/bindings/mtd/ibm,ndfc.yaml diff --git a/Documentation/devicetree/bindings/mtd/ibm,ndfc.txt b/Documentation/devicetree/bindings/mtd/ibm,ndfc.txt deleted file mode 100644 index 869f0b5f16e8..000000000000 --- a/Documentation/devicetree/bindings/mtd/ibm,ndfc.txt +++ /dev/null @@ -1,39 +0,0 @@ -AMCC NDFC (NanD Flash Controller) - -Required properties: -- compatible : "ibm,ndfc". -- reg : should specify chip select and size used for the chip (0x2000). - -Optional properties: -- ccr : NDFC config and control register value (default 0). -- bank-settings : NDFC bank configuration register value (default 0). - -Notes: -- partition(s) - follows the OF MTD standard for partitions - -Example: - -ndfc@1,0 { - compatible = "ibm,ndfc"; - reg = <0x00000001 0x00000000 0x00002000>; - ccr = <0x00001000>; - bank-settings = <0x80002222>; - #address-cells = <1>; - #size-cells = <1>; - - nand { - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "kernel"; - reg = <0x00000000 0x00200000>; - }; - partition@200000 { - label = "root"; - reg = <0x00200000 0x03E00000>; - }; - }; -}; - - diff --git a/Documentation/devicetree/bindings/mtd/ibm,ndfc.yaml b/Documentation/devicetree/bindings/mtd/ibm,ndfc.yaml new file mode 100644 index 000000000000..d5c392001ad3 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/ibm,ndfc.yaml @@ -0,0 +1,128 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/ibm,ndfc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: IBM/AMCC NDFC (NAND Flash Controller) + +maintainers: + - Miquel Raynal + - Richard Weinberger + +description: | + The NDFC is the NAND flash controller integrated into the IBM/AMCC + PowerPC 44x SoCs. + +allOf: + - $ref: nand-controller-legacy.yaml# + +properties: + compatible: + const: ibm,ndfc + + reg: + description: Chip select and size used for the chip. + maxItems: 1 + + ccr: + description: NDFC config and control register value. + $ref: /schemas/types.yaml#/definitions/uint32 + + bank-settings: + description: NDFC bank configuration register value. + $ref: /schemas/types.yaml#/definitions/uint32 + + nand: + type: object + description: | + NAND chip attached to the controller. The driver picks the first + child of the controller node, so this node is not required to be + named "nand@". + + allOf: + - $ref: mtd.yaml# + - $ref: nand-property.yaml# + - $ref: raw-nand-property.yaml# + + properties: + "#address-cells": + const: 1 + "#size-cells": + const: 1 + + patternProperties: + "^partition@[0-9a-f]+$": + $ref: /schemas/mtd/partitions/partition.yaml#/$defs/partition-node + deprecated: true + + unevaluatedProperties: false + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + ebc { + #address-cells = <2>; + #size-cells = <1>; + + ndfc@1,0 { + compatible = "ibm,ndfc"; + reg = <0x00000001 0x00000000 0x00002000>; + ccr = <0x00001000>; + bank-settings = <0x80002222>; + #address-cells = <1>; + #size-cells = <1>; + + nand { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000000 0x00200000>; + }; + partition@200000 { + label = "root"; + reg = <0x00200000 0x03e00000>; + }; + }; + }; + }; + - | + ebc { + #address-cells = <2>; + #size-cells = <1>; + + ndfc@1,0 { + compatible = "ibm,ndfc"; + reg = <0x00000001 0x00000000 0x00002000>; + #address-cells = <1>; + #size-cells = <1>; + + nand { + #address-cells = <1>; + #size-cells = <1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x00000000 0x00200000>; + }; + partition@200000 { + label = "root"; + reg = <0x00200000 0x03e00000>; + }; + }; + }; + }; + }; +... -- 2.55.0