From: Wilken Gottwalt <wilken.gottwalt@posteo.net>
To: Nguyen Minh Tien <tien.nguyenminh@embeddedlinux.blog>
Cc: Bjorn Andersson <andersson@kernel.org>,
Baolin Wang <baolin.wang@linux.alibaba.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Andre Przywara <andre.przywara@arm.com>,
Bastian Germann <bage@debian.org>,
linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] riscv: dts: allwinner: d1-t113: Add the hardware spinlock
Date: Sun, 27 Sep 2026 11:27:12 +0000 [thread overview]
Message-ID: <20260927132707.5f484946@posteo.net> (raw)
In-Reply-To: <20260927025626.69614-4-tien.nguyenminh@embeddedlinux.blog>
On Sun, 27 Sep 2026 09:56:26 +0700
Nguyen Minh Tien <tien.nguyenminh@embeddedlinux.blog> wrote:
> Add the hardware spinlock of the D1 and T113. It goes in
> sunxi-d1-t113.dtsi rather than sunxi-d1s-t113.dtsi, as the D1s manual
> has no spinlock in its memory map.
>
> Signed-off-by: Nguyen Minh Tien <tien.nguyenminh@embeddedlinux.blog>
> ---
> arch/riscv/boot/dts/allwinner/sunxi-d1-t113.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1-t113.dtsi
> b/arch/riscv/boot/dts/allwinner/sunxi-d1-t113.dtsi index 3b077dc086..228cc5c074 100644
> --- a/arch/riscv/boot/dts/allwinner/sunxi-d1-t113.dtsi
> +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1-t113.dtsi
> @@ -11,5 +11,14 @@ dsp_wdt: watchdog@1700400 {
> clock-names = "hosc", "losc";
> status = "reserved";
> };
> +
> + hwlock: hwlock@3005000 {
> + compatible = "allwinner,sun20i-d1-hwspinlock",
> + "allwinner,sun6i-a31-hwspinlock";
> + reg = <0x3005000 0x1000>;
> + clocks = <&ccu CLK_BUS_SPINLOCK>;
> + resets = <&ccu RST_BUS_SPINLOCK>;
> + #hwlock-cells = <1>;
> + };
> };
> };
Wouldn't it make more sense to add the "allwinner,sun20i-d1-hwspinlock" line to
the driver in the sun6i_hwspinlock_ids struct, drop
"allwinner,sun6i-a31-hwspinlock" here in the D1 device tree and update the yaml
file accordingly? Hmm, there are actually a lot more devices, which support that
spinlock (H2, H2+, H3, H5, H6...). A31 was the first one introducing that IP
core, but newer reference manuals removed the spinlock section completely.
There it is an unnamed 4k block in the memory map.
Bjorn, what do you think? Just stay with the "allwinner,sun6i-a31-hwspinlock"
string or add all the possible combinations like
"allwinner,sun8i-h2-plus-hwspinlock" or "allwinner,sun8i-a83t-hwspinlock".
I mean, it is just a naming game and there are 10+ SoCs supporting this
spinlock register file.
Oh, and I may be able to test it against the D1, I own a Sipeed Nezha. Though,
setting that one up for kernel + FreeRTOS testing is really, uhm, annoying.
greetings,
Wilken
prev parent reply other threads:[~2026-09-27 11:27 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-27 2:56 [PATCH 0/3] hwspinlock: sun6i: Allwinner D1 and T113 support Nguyen Minh Tien
2026-09-27 2:56 ` [PATCH 1/3] hwspinlock: sun6i: Get the clock and the reset without names Nguyen Minh Tien
2026-09-27 2:56 ` [PATCH 2/3] dt-bindings: hwlock: sun6i: Add compatible for Allwinner D1 Nguyen Minh Tien
2026-09-28 16:51 ` Conor Dooley
2026-09-27 2:56 ` [PATCH 3/3] riscv: dts: allwinner: d1-t113: Add the hardware spinlock Nguyen Minh Tien
2026-09-27 11:27 ` Wilken Gottwalt [this message]
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