Re: [PATCH v3 1/1] i2c: imc-skylake: add Intel Skylake-X iMC SMBus adapter

[Adamyno <padamyno@gmail.com>]

Hi Simone, Andi,

I tested this driver end-to-end on real hardware. Code as published at
https://github.com/systempal/i2c-imc-skylake (matching the v3/v4 series;
the v4 rework did not change anything relevant to this test).

Hardware: ASUS ROG STRIX X299-XE GAMING, Intel Core i9-7980XE (Skylake-X,
PCU function 8086:2085 at 0000:16:1e.5), 8x G.Skill F4-3600C18-16GTZR
(all slots populated), Linux Mint 22, kernel 7.0.0-30-generic.

Results:

- Both adapters register: "iMC SMBus Skylake-X channel 0/1" as
  /dev/i2c-1 and /dev/i2c-2.
- All eight ee1004 SPD EEPROM clients instantiate at 0x36/0x37 and
  0x50-0x53 on both channels; the sysfs eeprom dumps are correct
  (byte 0 = 0x23, JEDEC manufacturer G.Skill).
- SMBCNTL at the 16:00.0 iMC channel function reads 0x00000000
  (TSOD_POLL_EN clear), so the TSOD-polling check passes. On this BIOS
  allow_unsafe_access=1 is required ("firmware/SMM arbitration is
  unknown").
- Through the driver's adapters, OpenRGB's ENE SMBus DRAM detector finds
  all eight RGB controllers at SMBus addresses 0x70-0x73 (four per
  channel), and every mode (Static, Direct per-LED, Breathing, Flashing,
  Spectrum Cycle, Rainbow, Chase, Random Flicker) works end-to-end.
  This is the first working Linux RAM-RGB path on this platform.

One observation that may be worth adding to the driver documentation:
the RGB controller ICs on G.Skill Trident Z RGB DIMMs answer at SMBus
addresses 0x70-0x73 on this bus (4 per channel), not the 0x39-0x3D
range that older OpenRGB-era documentation assumed.

Tested-by: Adamyno <padamyno@gmail.com>

Thanks,
Adamyno