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Mon, 28 Sep 2026 12:32:41 -0700 Received: from inno-dell (10.127.8.10) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49 via Frontend Transport; Mon, 28 Sep 2026 12:32:35 -0700 Date: Mon, 28 Sep 2026 22:32:32 +0300 From: Zhi Wang To: Peter Colberg CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , Peter Colberg Subject: Re: [PATCH v2 1/8] rust: pci: add {enable,disable}_sriov(), to control SR-IOV capability Message-ID: <20260928223232.41e93123@inno-dell> In-Reply-To: References: <20260924190556.1620886-1-zhiw@nvidia.com> <20260924190556.1620886-2-zhiw@nvidia.com> X-Mailer: Claws Mail 4.3.1 (GTK 3.24.52; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF00018547:EE_|CH4PR12MB720178:EE_ X-MS-Office365-Filtering-Correlation-Id: 820a62f2-d996-4b22-1725-08df1d975295 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|7416014|1800799024|82310400026|23010399003|4143699003|6133799003|10067099003|56012099006|11063799006|22082099003|18002099003|3023799007; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: EbJcO8h9NOvlwo5bwb2QhaXjEnv3qoZGltyv2ip22haDXDH73+HtSgK8/mWyrSciKqVL3z75r6PbgYob9dpkPn8zdHlz8Nkczh+BQxpb0LDjIr0mxDaZe5TnVOV0Y/jl2HVwaqNPTmWHhRuKWgKrkCH0FAAs6nIf+TSbAJ4ULC3hp7rFTYaI7IklkdSudVif2+fGJZAMevpQk+DhKcDp9NaduNIugHmhyAWhYBTtZtMBTcfAoyUmWu7ON9WvjxPNWrRQMQcBkPOaqirCGc1by+urbZn3/6eFRly389eb9F+TIoRlyqp4Fn7ucfAixrxMDwkHIWUIyoqEWcFNz18zgBiuJXfIKX18feEj+WaeNMM3lZRFn6wu8G3JGMWNdHWGLG43cwiSdTgFRcacLmhN98D7NnmNxvQ2bUtZ1OJxp1WGifGy5nv0FanONsZOlle8 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Sep 2026 19:33:07.0805 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 820a62f2-d996-4b22-1725-08df1d975295 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00018547.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH4PR12MB720178 On Fri, 25 Sep 2026 16:43:16 -0400 Peter Colberg wrote: > Hi Zhi, > > On Thu, Sep 24, 2026 at 10:05:48PM +0300, Zhi Wang wrote: > > From: Peter Colberg > > Thank you for updating the series and apologies for the silence. > > As part of the next revision, could you please update my email address > in all patches, which has changed (for kernel contributions only): > > From: Peter Colberg > Sure! > Thanks, > Peter > > > > > Add methods to enable and disable the Single Root I/O Virtualization > > (SR-IOV) capability for a PCI device. The wrapped C methods take > > care of validating whether the device is a Physical Function (PF), > > whether SR-IOV is currently disabled (or enabled), and whether the > > number of requested VFs does not exceed the total number of > > supported VFs. > > > > Synchronously disable SR-IOV in the Rust PCI remove callback before > > unbinding the PF driver. This ensures that when a Virtual > > Function (VF) is bound to a driver, the corresponding Physical > > Function (PF) is bound to a driver, too, which is a prerequisite > > for exposing a safe Rust API that allows a VF driver to obtain the > > PF device for a VF device and subsequently access the private data > > of the PF driver. > > > > Suggested-by: Danilo Krummrich > > Signed-off-by: Peter Colberg > > Signed-off-by: Zhi Wang > > --- > > rust/kernel/pci.rs | 36 ++++++++++++++++++++++++++++++++++++ > > 1 file changed, 36 insertions(+) > > > > diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs > > index 3ec897709e89..e6dac919f02d 100644 > > --- a/rust/kernel/pci.rs > > +++ b/rust/kernel/pci.rs > > @@ -133,6 +133,10 @@ extern "C" fn remove_callback(pdev: *mut > > bindings::pci_dev) { // INVARIANT: `pdev` is valid for the duration > > of `remove_callback()`. let pdev = unsafe { > > &*pdev.cast::>>() }; > > + // Keep PF data installed until all VF remove callbacks > > have completed. > > + #[cfg(CONFIG_PCI_IOV)] > > + pdev.disable_sriov(); > > + > > // SAFETY: `remove_callback` is only ever called after a > > successful call to // `probe_callback`, hence it's guaranteed that > > `Device::set_drvdata()` has been called // and stored a > > `Pin>>`. @@ -472,6 +476,38 @@ pub fn > > set_master(&self) { // SAFETY: `self.as_raw` is guaranteed to be a > > pointer to a valid `struct pci_dev`. unsafe { > > bindings::pci_set_master(self.as_raw()) }; } > > + > > + /// Enable the Single Root I/O Virtualization (SR-IOV) > > capability for this device, > > + /// where `nr_virtfn` is number of Virtual Functions (VF) to > > enable. > > + #[cfg(CONFIG_PCI_IOV)] > > + pub fn enable_sriov(&self, nr_virtfn: i32) -> Result { > > + // SAFETY: > > + // `self.as_raw` returns a valid pointer to a `struct > > pci_dev`. > > + // > > + // `pci_enable_sriov()` checks that the enable operation > > is valid: > > + // - the device is a Physical Function (PF), > > + // - SR-IOV is currently disabled, and > > + // - `nr_virtfn` does not exceed the total number of > > supported VFs. > > + // > > + // The Core device context inherits from the Bound device > > context, > > + // which guarantees that the PF device is bound to a > > driver. > > + to_result(unsafe { > > bindings::pci_enable_sriov(self.as_raw(), nr_virtfn) }) > > + } > > + > > + /// Disable the Single Root I/O Virtualization (SR-IOV) > > capability for this device. > > + #[cfg(CONFIG_PCI_IOV)] > > + pub fn disable_sriov(&self) { > > + // SAFETY: > > + // `self.as_raw` returns a valid pointer to a `struct > > pci_dev`. > > + // > > + // `pci_disable_sriov()` checks that the disable operation > > is valid: > > + // - the device is a Physical Function (PF), and > > + // - SR-IOV is currently enabled. > > + // > > + // The Core device context inherits from the Bound device > > context, > > + // which guarantees that the PF device is bound to a > > driver. > > + unsafe { bindings::pci_disable_sriov(self.as_raw()) }; > > + } > > } > > > > // SAFETY: `pci::Device` is a transparent wrapper of `struct > > pci_dev`. -- > > 2.53.0 > >