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[92.247.61.126]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a00d1011d9sm91835165e9.15.2026.09.29.06.41.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2026 06:41:06 -0700 (PDT) From: Petko Manolov To: linux-kernel@vger.kernel.org Cc: devicetree@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, dinguyen@kernel.org, arnemaximilian.richter@draeger.com, martynas.grybauskas@draeger.com, Petko Manolov Subject: [PATCH v8 2/3] dt-bindings: arm: altera: add Draeger M48 dual-cpu board Date: Tue, 29 Sep 2026 16:40:56 +0300 Message-ID: <20260929134058.819371-3-petko.manolov@konsulko.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260929134058.819371-1-petko.manolov@konsulko.com> References: <20260929134058.819371-1-petko.manolov@konsulko.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit M48 is a heterogeneous board made by Draeger that is based on two independent cpus, that are monitoring each other. One of them is imx6, the other is Altera SoCFPGA Cyclone 5. The latter is booting independently off qspi. Signed-off-by: Petko Manolov --- Documentation/devicetree/bindings/arm/altera.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 3030cf46fe74..b67dc10b0a11 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -47,6 +47,7 @@ properties: - enum: - altr,socfpga-cyclone5-socdk - denx,mcvevk + - draeger,socfpga-m48 - ebv,socrates - macnica,sodia - novtech,chameleon96 -- 2.47.3