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Tue, 29 Sep 2026 07:21:14 -0700 (PDT) Received: from localhost.localdomain ([78.40.184.2]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-3a76a503af4sm4538631fa.33.2026.09.29.07.21.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2026 07:21:13 -0700 (PDT) From: Roman Demidov To: Rob Clark Cc: Roman Demidov , Sean Paul , Konrad Dybcio , Akhil P Oommen , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, lvc-project@linuxtesting.org Subject: [PATCH v2 1/2] drm/msm/a6xx: fix use-after-free of OPP in a6xx_pm_resume Date: Tue, 29 Sep 2026 17:20:58 +0300 Message-ID: <20260929142103.81854-1-roman.demidov.nn@gmail.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The OPP reference obtained via dev_pm_opp_find_freq_ceil() is dropped with dev_pm_opp_put() before being passed to dev_pm_opp_set_opp(). If the reference count reaches zero, the OPP object may be freed, leading to a use-after-free when dev_pm_opp_set_opp() dereferences it. Fix the order of calls: first use the OPP to set the required performance state, then release the reference. Fixes: 5a903a44a984 ("drm/msm/a6xx: Introduce GMU wrapper support") Signed-off-by: Roman Demidov --- v2: The dev_pm_opp_find_freq_ceil() function returns an OPP object with an incremented reference count. Dropping this reference via dev_pm_opp_put() could cause the object to be freed if it is concurrently removed from the OPP table. Fix this as Sashiko AI suggested. drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c index f9de9329dee3..c827986951cc 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -2177,10 +2177,10 @@ static int a6xx_pm_resume(struct msm_gpu *gpu) ret = PTR_ERR(opp); goto err_set_opp; } - dev_pm_opp_put(opp); /* Set the core clock and bus bw, having VDD scaling in mind */ dev_pm_opp_set_opp(&gpu->pdev->dev, opp); + dev_pm_opp_put(opp); pm_runtime_resume_and_get(gmu->dev); pm_runtime_resume_and_get(gmu->gxpd); -- 2.53.0