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[103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14d08fb50f1sm2711531c88.13.2026.09.29.23.39.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2026 23:39:39 -0700 (PDT) From: Himanshu Chauhan To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-perf-users@vger.kernel.org Cc: peterz@infradead.org, mingo@redhat.com, alex@ghiti.fr, aou@eecs.berkeley.edu, jtaubepe@redhat.com, palmer@dabbelt.com, pjw@kernel.org, qingfang.deng@linux.dev, shuah@kernel.org, thecharlesjenkins@gmail.com, cp0613@linux.alibaba.com, Himanshu Chauhan Subject: [PATCH v7 2/8] riscv: Add breakpoint and watchpoint test for riscv Date: Wed, 30 Sep 2026 12:09:13 +0530 Message-ID: <20260930063919.608911-3-himanshu.chauhan@oss.qualcomm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260930063919.608911-1-himanshu.chauhan@oss.qualcomm.com> References: <20260930063919.608911-1-himanshu.chauhan@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: O_nda8ir2cVma0FD0amIMBIFofZAjxWA X-Proofpoint-ORIG-GUID: O_nda8ir2cVma0FD0amIMBIFofZAjxWA X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTMwMDAyNiBTYWx0ZWRfX71nhWMc8BlKH plyMg6cV5d7LM9I15lPKJvXPu26pty/6aCMV2Lm8Zytdr/u4PNPYibXakLjwJO9tzfKVDxsoV+S JoDuiQzTRtUfKAoPmDxWayUwl41ZERN0y5UYurd6Cyz761AlZ1oTz01lFqidPlY/OStdtCfDAYu WsB2zJyYrfhP48qlGck5oE/IGJLxuKJiy0+biH8gqKJOm1MT8vFKMQd/2JiUBYoi109UNBUs8ch C1G36YSe2+71X4ymKPynaIwKTtV7UzGjN4srOQtJtZT/7dqPmPpfX99FJiwcUsoBXV1du1eEyvd p0vb9toJka9i4H5lKen+OZR9DJ4IX6acgut5zbG97rFToCnb5tBkT/NoiI384+hH8LXdeO3dHyQ N2BlMBSOkrc0eTbcgH7FUNDRkOhLhkEZZBoDNxZjqY6vRkydjYuJxroHFX5CVU24DJWYddQXf8D nIQTDqAUehxuREqt/+g== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTMwMDAyNiBTYWx0ZWRfX14dZs5QpnCT9 yF11Yso3TCO+RzG3AtRiUNUnpUjBCSrV6g/3mH3kpPwGURsm2ajKnjkUJGNsx7b34IBDtB6YJm1 vK3xKGfjOgsuAzoSm0XOsTDiXSzHwq8= X-Authority-Analysis: v=2.4 cv=Tu1zFzXh c=1 sm=1 tr=0 ts=6abcaead cx=c_pps a=Uww141gWH0fZj/3QKPojxA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=qd3H3YWZb18LjlhzOR0A:9 a=PxkB5W3o20Ba91AHUih5:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-29_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 malwarescore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 clxscore=1015 bulkscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609300026 Add self test for riscv architecture. It uses ptrace to ptrace framework to set/unset break/watchpoint and uses signals to check triggers. Also add $(KHDR_INCLUDES) to CFLAGS for the riscv test build so the UAPI headers exercised by the test can be located during compilation. Signed-off-by: Himanshu Chauhan --- tools/testing/selftests/breakpoints/Makefile | 5 + .../breakpoints/breakpoint_test_riscv.c | 219 ++++++++++++++++++ 2 files changed, 224 insertions(+) create mode 100644 tools/testing/selftests/breakpoints/breakpoint_test_riscv.c diff --git a/tools/testing/selftests/breakpoints/Makefile b/tools/testing/selftests/breakpoints/Makefile index 0b8f5acf7c78..b32c56b3c1db 100644 --- a/tools/testing/selftests/breakpoints/Makefile +++ b/tools/testing/selftests/breakpoints/Makefile @@ -12,5 +12,10 @@ ifneq (,$(filter $(ARCH),aarch64 arm64)) TEST_GEN_PROGS += breakpoint_test_arm64 endif +ifneq (,$(filter $(ARCH),riscv)) +CFLAGS += -static $(KHDR_INCLUDES) +TEST_GEN_PROGS += breakpoint_test_riscv +endif + include ../lib.mk diff --git a/tools/testing/selftests/breakpoints/breakpoint_test_riscv.c b/tools/testing/selftests/breakpoints/breakpoint_test_riscv.c new file mode 100644 index 000000000000..0649940b709e --- /dev/null +++ b/tools/testing/selftests/breakpoints/breakpoint_test_riscv.c @@ -0,0 +1,219 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2026 Qualcomm Technologies, Inc. + * + * Author: Himanshu Chauhan + */ + +#define _GNU_SOURCE +#include /* Definition of PERF_* constants */ +#include /* Definition of HW_* constants */ +#include /* Definition of SYS_* constants */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef noinline +#define noinline __attribute__((noinline)) +#endif + +static int gfd; +sem_t ib_mtx, wp_mtx; +static int bp_triggered, wp_triggered; +static int test_func_sink; +static const int wait_timeout_sec = 5; + +int setup_bp(bool is_x, void *addr, int sig) +{ + struct perf_event_attr pe; + int fd; + + memset(&pe, 0, sizeof(struct perf_event_attr)); + pe.type = PERF_TYPE_BREAKPOINT; + pe.size = sizeof(struct perf_event_attr); + + pe.config = 0; + pe.bp_type = is_x ? HW_BREAKPOINT_X : HW_BREAKPOINT_W; + pe.bp_addr = (unsigned long)addr; + pe.bp_len = sizeof(long); + + pe.sample_period = 1; + pe.sample_type = PERF_SAMPLE_IP; + pe.wakeup_events = 1; + + pe.disabled = 1; + pe.exclude_kernel = 1; + pe.exclude_hv = 1; + + fd = syscall(SYS_perf_event_open, &pe, 0, -1, -1, 0); + if (fd < 0) { + printf("Failed to open event: %llx\n", pe.config); + return -1; + } + + fcntl(fd, F_SETFL, O_RDWR | O_NONBLOCK | O_ASYNC); + fcntl(fd, F_SETSIG, sig); + fcntl(fd, F_SETOWN, getpid()); + + ioctl(fd, PERF_EVENT_IOC_RESET, 0); + + return fd; +} + +static void sig_handler_bp(int signum, siginfo_t *oh, void *uc) +{ + int ret; + + bp_triggered++; + + printf("Breakpoint triggered!\n"); + ioctl(gfd, PERF_EVENT_IOC_DISABLE, 0); + ret = sem_post(&ib_mtx); + if (ret) { + printf("Failed to report BP success\n"); + return; + } +} + +static void sig_handler_wp(int signum, siginfo_t *oh, void *uc) +{ + int ret; + + printf("Watchpoint triggered!\n"); + ioctl(gfd, PERF_EVENT_IOC_DISABLE, 0); + wp_triggered++; + + ret = sem_post(&wp_mtx); + + if (ret) { + printf("Failed to report WP success\n"); + return; + } +} + +/* + * Keep a real instruction address for HW execute breakpoints: prevent inlining + * and force a visible side effect so the function can't be optimized away. + */ +static noinline void test_func(void) +{ + test_func_sink++; + __asm__ __volatile__("" : : "g" (test_func_sink)); +} + +static int trigger_bp(void) +{ + struct sigaction sa; + + memset(&sa, 0, sizeof(struct sigaction)); + sa.sa_sigaction = (void *)sig_handler_bp; + sa.sa_flags = SA_SIGINFO; + + if (sigaction(SIGIO, &sa, NULL) < 0) { + printf("Failed to setup signal handler\n"); + return -1; + } + + gfd = setup_bp(1, test_func, SIGIO); + + if (gfd < 0) { + printf("Failed to setup breakpoint.\n"); + return -1; + } + + ioctl(gfd, PERF_EVENT_IOC_ENABLE, 0); + + test_func(); + + ioctl(gfd, PERF_EVENT_IOC_DISABLE, 0); + + close(gfd); + + return 0; +} + +static int trigger_wp(void) +{ + struct sigaction sa; + unsigned long test_data; + + memset(&sa, 0, sizeof(struct sigaction)); + sa.sa_sigaction = (void *)sig_handler_wp; + sa.sa_flags = SA_SIGINFO; + + if (sigaction(SIGUSR1, &sa, NULL) < 0) { + printf("Failed to setup signal handler\n"); + return -1; + } + + gfd = setup_bp(0, &test_data, SIGUSR1); + + if (gfd < 0) { + printf("Failed to setup watchpoint\n"); + return -1; + } + + ioctl(gfd, PERF_EVENT_IOC_ENABLE, 0); + test_data = 0xdeadbeef; + ioctl(gfd, PERF_EVENT_IOC_DISABLE, 0); + + return 0; +} + +static int wait_event(sem_t *sem, const char *name) +{ + struct timespec ts; + + if (clock_gettime(CLOCK_REALTIME, &ts)) { + printf("%s: Failed to get current time\n", name); + return -1; + } + + /* + * Deadlock fix: avoid blocking forever on sem_wait() if the breakpoint/ + * watchpoint signal never arrives. Use a bounded wait and fail the test + * on timeout instead. + */ + ts.tv_sec += wait_timeout_sec; + if (!sem_timedwait(sem, &ts)) + return 0; + + if (errno == ETIMEDOUT) + printf("%s: Timed out waiting for event\n", name); + else + printf("%s: sem_timedwait() failed with %d\n", name, errno); + + return -1; +} + +int main(int argc, char *argv[]) +{ + sem_init(&ib_mtx, 0, 0); + if (trigger_bp() < 0) + return -1; + if (wait_event(&ib_mtx, "Breakpoint") < 0) + return -1; + + if (bp_triggered) + printf("Breakpoint test passed!\n"); + + sem_init(&wp_mtx, 0, 0); + if (trigger_wp() < 0) + return -1; + if (wait_event(&wp_mtx, "Watchpoint") < 0) + return -1; + + if (wp_triggered) + printf("Watchpoint test passed!\n"); + + return 0; +} -- 2.43.0