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([87.200.95.144]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4a01771b0e8sm62084555e9.12.2026.09.30.05.56.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 05:56:33 -0700 (PDT) From: Christian Hewitt To: Boris Brezillon , Rob Herring , Steven Price , =?UTF-8?q?Adri=C3=A1n=20Larumbe?= , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , AngeloGioacchino Del Regno , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/panfrost: reset the Amlogic GXM GPU on runtime resume Date: Wed, 30 Sep 2026 12:56:29 +0000 Message-ID: <20260930125629.2691968-1-christianshewitt@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit After its first runtime suspend, every power-off of the Mali-T820 in Amlogic GXM SoCs times out and floods the log with shader, tiler and L2 power transition timeouts. Following a soft reset the cores report not ready but PWRTRANS never clears, however long the driver waits. The transitions complete normally when the GPU comes out of a hardware reset, as it does at probe. Use runtime PM with reset and clock control for GXM so the GPU is reset on every resume. Fixes: 22aa1a209018 ("drm/panfrost: Really power off GPU cores in panfrost_gpu_power_off()") Assisted-by: Claude:claude-opus-5-5 Signed-off-by: Christian Hewitt --- drivers/gpu/drm/panfrost/panfrost_drv.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 36cc2e67a308..df8a41a9a70f 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -1092,6 +1092,13 @@ static const struct panfrost_compatible amlogic_data = { .vendor_quirk = panfrost_gpu_amlogic_quirk, }; +static const struct panfrost_compatible amlogic_gxm_data = { + .num_supplies = ARRAY_SIZE(default_supplies) - 1, + .supply_names = default_supplies, + .vendor_quirk = panfrost_gpu_amlogic_quirk, + .pm_features = BIT(GPU_PM_RT), +}; + static const char * const mediatek_pm_domains[] = { "core0", "core1", "core2", "core3", "core4" }; /* @@ -1156,7 +1163,7 @@ static const struct panfrost_compatible mediatek_mt8370_data = { static const struct of_device_id dt_match[] = { /* Set first to probe before the generic compatibles */ { .compatible = "amlogic,meson-gxm-mali", - .data = &amlogic_data, }, + .data = &amlogic_gxm_data, }, { .compatible = "amlogic,meson-g12a-mali", .data = &amlogic_data, }, { .compatible = "renesas,r9a08g046-mali", .data = &default_pm_rt_data }, -- 2.43.0