From: Peter Zijlstra <peterz@infradead.org>
To: Johannes Weiner <hannes@cmpxchg.org>
Cc: David Stevens <stevensd@google.com>,
Suren Baghdasaryan <surenb@google.com>,
Ingo Molnar <mingo@redhat.com>,
K Prateek Nayak <kprateek.nayak@amd.com>,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH] sched/psi: clamp negative cpu_clock() skew
Date: Wed, 30 Sep 2026 17:19:02 +0200 [thread overview]
Message-ID: <20260930151902.GO88198@noisy.programming.kicks-ass.net> (raw)
In-Reply-To: <ar0bPEyD5CBK331p@cmpxchg.org>
On Wed, Sep 30, 2026 at 10:22:52AM -0400, Johannes Weiner wrote:
> On Tue, Sep 29, 2026 at 10:17:40AM +0200, Peter Zijlstra wrote:
> > On Tue, Sep 29, 2026 at 10:10:04AM +0200, Peter Zijlstra wrote:
> >
> > > > When running browser workloads on an Intel N100 with a sustained
> > > > psi.mem.some of 2-3%, this underflow is observed once every couple of
> > > > hours.
> >
> > Reading is hard. This is sad, that's a relatively modern chip :-(
>
> I'm still struggling, but I'm under the weather so bear with me.
>
> That's a cpu_clock() implementation issue, right? "The value for
> cpu_clock(i) is monotonic for constant i". Presumably violating that
> would be a problem beyond psi?
Yeah, although most everybody has a filter on top for some reason or
another.
Mostly it could happen that when the watchdog would detect the TSC
wasn't stable after all, you'd be up a creek if you didn't also have
this filter.
But I'm very sad to see modern chips have shit TSC, that wasn't supposed
to happen.
next prev parent reply other threads:[~2026-09-30 15:19 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-28 23:37 David Stevens
2026-09-29 8:10 ` Peter Zijlstra
2026-09-29 8:17 ` Peter Zijlstra
2026-09-30 14:22 ` Johannes Weiner
2026-09-30 15:19 ` Peter Zijlstra [this message]
2026-09-30 15:30 ` David Stevens
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